radv: Keep track of TCS outputs that need LDS.

Instead of reserving LDS space for all TCS outputs, we will now
only reserve it for TCS outputs which really need it, ie. those
which are read by the TCS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28488>

4 files changed, 17 insertions, 12 deletions

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index f8e04211c19..bebb57ef46e 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2648,14 +2648,14 @@ radv_emit_patch_control_points(struct radv_cmd_buffer *cmd_buffer)
       /* Compute the number of patches. */
       cmd_buffer->state.tess_num_patches = get_tcs_num_patches(
          d->vk.ts.patch_control_points, tcs->info.tcs.tcs_vertices_out, vs->info.vs.num_linked_outputs,
-         tcs->info.tcs.num_linked_outputs, tcs->info.tcs.num_linked_patch_outputs, pdev->hs.tess_offchip_block_dw_size,
-         pdev->info.gfx_level, pdev->info.family);
+         tcs->info.tcs.num_lds_per_vertex_outputs, tcs->info.tcs.num_lds_per_patch_outputs,
+         pdev->hs.tess_offchip_block_dw_size, pdev->info.gfx_level, pdev->info.family);
 
       /* Compute the LDS size. */
       cmd_buffer->state.tess_lds_size =
          calculate_tess_lds_size(pdev->info.gfx_level, d->vk.ts.patch_control_points, tcs->info.tcs.tcs_vertices_out,
                                  vs->info.vs.num_linked_outputs, cmd_buffer->state.tess_num_patches,
-                                 tcs->info.tcs.num_linked_outputs, tcs->info.tcs.num_linked_patch_outputs);
+                                 tcs->info.tcs.num_lds_per_vertex_outputs, tcs->info.tcs.num_lds_per_patch_outputs);
    }
 
    ls_hs_config = S_028B58_NUM_PATCHES(cmd_buffer->state.tess_num_patches) |
diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c
index 2bd089426cb..428aad57450 100644
--- a/src/amd/vulkan/radv_pipeline_graphics.c
+++ b/src/amd/vulkan/radv_pipeline_graphics.c
@@ -1477,7 +1477,6 @@ radv_link_tcs(const struct radv_device *device, struct radv_shader_stage *tcs_st
    nir_linked_io_var_info tcs2tes = nir_assign_linked_io_var_locations(tcs_stage->nir, tes_stage->nir);
 
    tcs_stage->info.tcs.num_linked_outputs = tcs2tes.num_linked_io_vars;
-   tcs_stage->info.tcs.num_linked_patch_outputs = tcs2tes.num_linked_patch_io_vars;
    tcs_stage->info.outputs_linked = true;
 
    tes_stage->info.tes.num_linked_inputs = tcs2tes.num_linked_io_vars;
diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index 2d49c2794a4..8c958b3fe44 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -519,7 +519,6 @@ gather_info_unlinked_output(struct radv_shader_info *info, const nir_shader *nir
       return;
 
    const uint64_t io_mask = gather_io_mask(nir->info.outputs_written, 0, false);
-   const uint64_t patch_io_mask = gather_io_mask(nir->info.outputs_written, nir->info.patch_outputs_written, true);
    const unsigned num_linked_outputs = util_last_bit64(io_mask);
 
    switch (nir->info.stage) {
@@ -528,7 +527,6 @@ gather_info_unlinked_output(struct radv_shader_info *info, const nir_shader *nir
       break;
    case MESA_SHADER_TESS_CTRL:
       info->tcs.num_linked_outputs = num_linked_outputs;
-      info->tcs.num_linked_patch_outputs = util_last_bit64(patch_io_mask);
       break;
    case MESA_SHADER_TESS_EVAL:
       info->tes.num_linked_outputs = num_linked_outputs;
@@ -591,6 +589,13 @@ gather_shader_info_tcs(struct radv_device *device, const nir_shader *nir,
 {
    const struct radv_physical_device *pdev = radv_device_physical(device);
 
+   const uint64_t tess_lvl_mask = VARYING_BIT_TESS_LEVEL_OUTER | VARYING_BIT_TESS_LEVEL_INNER;
+   const uint64_t per_vtx_out_mask = nir->info.outputs_read & nir->info.outputs_written & ~tess_lvl_mask;
+   const uint64_t tess_lvl_out_mask = nir->info.outputs_written & tess_lvl_mask;
+   const uint32_t per_patch_out_mask = nir->info.patch_outputs_read & nir->info.patch_outputs_written;
+
+   info->tcs.num_lds_per_vertex_outputs = util_bitcount64(per_vtx_out_mask);
+   info->tcs.num_lds_per_patch_outputs = util_bitcount64(tess_lvl_out_mask) + util_bitcount(per_patch_out_mask);
    info->tcs.tcs_vertices_out = nir->info.tess.tcs_vertices_out;
    info->tcs.tes_inputs_read = ~0ULL;
    info->tcs.tes_patch_inputs_read = ~0ULL;
@@ -602,14 +607,14 @@ gather_shader_info_tcs(struct radv_device *device, const nir_shader *nir,
       /* Number of tessellation patches per workgroup processed by the current pipeline. */
       info->num_tess_patches = get_tcs_num_patches(
          gfx_state->ts.patch_control_points, nir->info.tess.tcs_vertices_out, info->tcs.num_linked_inputs,
-         info->tcs.num_linked_outputs, info->tcs.num_linked_patch_outputs, pdev->hs.tess_offchip_block_dw_size,
+         info->tcs.num_lds_per_vertex_outputs, info->tcs.num_lds_per_patch_outputs, pdev->hs.tess_offchip_block_dw_size,
          pdev->info.gfx_level, pdev->info.family);
 
       /* LDS size used by VS+TCS for storing TCS inputs and outputs. */
       info->tcs.num_lds_blocks =
          calculate_tess_lds_size(pdev->info.gfx_level, gfx_state->ts.patch_control_points,
                                  nir->info.tess.tcs_vertices_out, info->tcs.num_linked_inputs, info->num_tess_patches,
-                                 info->tcs.num_linked_outputs, info->tcs.num_linked_patch_outputs);
+                                 info->tcs.num_lds_per_vertex_outputs, info->tcs.num_lds_per_patch_outputs);
    }
 }
 
diff --git a/src/amd/vulkan/radv_shader_info.h b/src/amd/vulkan/radv_shader_info.h
index bd95a4c2f30..9329fc17b9f 100644
--- a/src/amd/vulkan/radv_shader_info.h
+++ b/src/amd/vulkan/radv_shader_info.h
@@ -150,7 +150,7 @@ struct radv_shader_info {
       bool point_mode;
       bool reads_tess_factors;
       unsigned tcs_vertices_out;
-      uint8_t num_linked_inputs;
+      uint8_t num_linked_inputs; /* Number of reserved per-vertex input slots in VRAM. */
       uint8_t num_linked_outputs;
       uint32_t num_outputs; /* For NGG streamout only */
    } tes;
@@ -229,9 +229,10 @@ struct radv_shader_info {
       uint64_t tes_patch_inputs_read;
       unsigned tcs_vertices_out;
       uint32_t num_lds_blocks;
-      uint8_t num_linked_inputs;
-      uint8_t num_linked_outputs;
-      uint8_t num_linked_patch_outputs;
+      uint8_t num_linked_inputs;          /* Number of reserved per-vertex input slots in LDS. */
+      uint8_t num_linked_outputs;         /* Number of reserved per-vertex output slots in VRAM. */
+      uint8_t num_lds_per_vertex_outputs; /* Number of reserved per-vertex output slots in LDS. */
+      uint8_t num_lds_per_patch_outputs;  /* Number of reserved per-patch output slots in LDS. */
       bool tes_reads_tess_factors : 1;
    } tcs;
    struct {