intel: add SVM exec ioctl and man page

5 files changed, 167 insertions, 1 deletions

diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 887ac4790..921b87d8e 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -231,6 +231,7 @@ typedef struct _drm_i915_sarea {
 #define DRM_I915_GEM_CONTEXT_GETPARAM	0x34
 #define DRM_I915_GEM_CONTEXT_SETPARAM	0x35
 #define DRM_I915_GEM_CONTEXT_CREATE2	0x36
+#define DRM_I915_EXEC_MM		0x37
 
 #define DRM_IOCTL_I915_INIT		DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
 #define DRM_IOCTL_I915_FLUSH		DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -285,6 +286,7 @@ typedef struct _drm_i915_sarea {
 #define DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM	DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_GETPARAM, struct drm_i915_gem_context_param)
 #define DRM_IOCTL_I915_GEM_CONTEXT_SETPARAM	DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_SETPARAM, struct drm_i915_gem_context_param)
 #define DRM_IOCTL_I915_GEM_CONTEXT_CREATE2	DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE2, struct drm_i915_gem_context_create2)
+#define DRM_IOCTL_I915_EXEC_MM			DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_EXEC_MM, struct drm_i915_exec_mm)
 
 /* Allow drivers to submit batchbuffers directly to hardware, relying
  * on the security mechanisms provided by hardware.
@@ -1161,5 +1163,39 @@ struct drm_i915_gem_context_param {
 	__u64 value;
 };
 
+/**
+ * drm_i915_exec_mm - shared address space execbuf
+ * @batch_ptr: address of batch buffer (in context's CPU address space)
+ * @ctx_id: context to use for execution
+ * @ring_id: ring to which this context will be submitted
+ * @flags: see flags
+ * @fence: returned fence handle
+ * @fence: returned fence handle
+ * @fence_dep_count: number of fences this execution depends on
+ * @fence_deps: array of fence IDs (u32) this execution depends on
+ *
+ * This simlified execbuf just executes an MI_BATCH_BUFFER_START at
+ * @batch_ptr using @ctx_id as the context.  The context will indicate
+ * which address space the @batch_ptr will use.
+ *
+ * Note @batch_ptr must be dword aligned.
+ *
+ * By default, the kernel will simply execute the address given on the GPU.
+ * If the %I915_EXEC_MM_FENCE flag is passed in the @flags field however,
+ * the kernel will return a Android native sync object for the caller to
+ * use to synchronize execution (see the android-native-sync(7) man page).
+ */
+struct drm_i915_exec_mm {
+	__u64 batch_ptr;
+	__u32 ctx_id;
+	__u32 ring_id; /* see execbuffer2 flags */
+	__u32 flags;
+	__u32 pad;
+#define I915_EXEC_MM_FENCE (1<<0)
+	__u32 fence;
+	__u32 fence_dep_count;
+	__u64 fence_deps;
+};
+
 #endif /* _I915_DRM_H_ */
 
diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h
index 217a32ded..06a652117 100644
--- a/intel/intel_bufmgr.h
+++ b/intel/intel_bufmgr.h
@@ -216,6 +216,7 @@ int drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx,
 int drm_intel_bo_gem_export_to_prime(drm_intel_bo *bo, int *prime_fd);
 drm_intel_bo *drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr,
 						int prime_fd, int size);
+int drm_intel_exec_mm(drm_intel_context *ctx, uint64_t start, int flags);
 
 /* drm_intel_bufmgr_fake.c */
 drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd,
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 00325a836..dd0004372 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -3127,6 +3127,24 @@ drm_intel_gem_svm_context_create(drm_intel_bufmgr *bufmgr)
 	return context;
 }
 
+int drm_intel_exec_mm(drm_intel_context *ctx, uint64_t start, int flags)
+{
+	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)ctx->bufmgr;
+	struct drm_i915_exec_mm mm = { 0 };
+	int ret;
+
+	mm.batch_ptr = start;
+	mm.ctx_id = ctx->ctx_id;
+
+	ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_EXEC_MM, &mm);
+	if (ret) {
+		DBG("DRM_IOCTL_I915_EXEC_MM failed: %s\n", strerror(errno));
+		return ret;
+	}
+
+	return mm.fence;
+}
+
 drm_intel_context *
 drm_intel_gem_context_create(drm_intel_bufmgr *bufmgr)
 {
diff --git a/man/Makefile.am b/man/Makefile.am
index 00eb42345..ad0a40d94 100644
--- a/man/Makefile.am
+++ b/man/Makefile.am
@@ -7,7 +7,8 @@
 libman_PRE = \
 	drmAvailable.xml \
 	drmHandleEvent.xml \
-	drmModeGetResources.xml
+	drmModeGetResources.xml \
+	drm_intel_exec_mm.3
 
 miscman_PRE = \
 	drm.xml \
diff --git a/man/drm_intel_exec_mm.xml b/man/drm_intel_exec_mm.xml
new file mode 100644
index 000000000..7a2c74ded
--- /dev/null
+++ b/man/drm_intel_exec_mm.xml
@@ -0,0 +1,110 @@
+<?xml version='1.0'?> <!--*-nxml-*-->
+<!DOCTYPE refentry PUBLIC "-//OASIS//DTD DocBook XML V4.2//EN"
+          "http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd">
+
+<!--
+  Written 2015 by Jesse Barnes <jbarnes@virtuousgeek.org> based on
+  drmModeGetResources template from David Herrmann
+  Dedicated to the Public Domain
+-->
+
+<refentry id="drm_intel_exec_mm">
+  <refentryinfo>
+    <title>Direct Rendering Manager</title>
+    <productname>libdrm</productname>
+    <date>June 2015</date>
+    <authorgroup>
+      <author>
+        <contrib>Developer</contrib>
+        <firstname>Jesse</firstname>
+        <surname>Barnes</surname>
+        <email>jbarnes@virtuousgeek.org</email>
+      </author>
+    </authorgroup>
+  </refentryinfo>
+
+  <refmeta>
+    <refentrytitle>drm_intel_exec_mm</refentrytitle>
+    <manvolnum>3</manvolnum>
+  </refmeta>
+
+  <refnamediv>
+    <refname>drm_intel_exec_mm</refname>
+    <refpurpose>Execute GPU code at a given address</refpurpose>
+  </refnamediv>
+
+  <refsynopsisdiv>
+
+    <funcsynopsis>
+      <funcsynopsisinfo>#include &lt;intel_bufmgr.h&gt;</funcsynopsisinfo>
+
+      <funcprototype>
+        <funcdef>int <function>drm_intel_exec_mm</function></funcdef>
+        <paramdef>drm_intel_context *<parameter>ctx</parameter></paramdef>
+	<paramdef>uint64_t <parameter>start</parameter></paramdef>
+	<paramdef>int <parameter>flags</parameter></paramdef>
+      </funcprototype>
+    </funcsynopsis>
+
+  </refsynopsisdiv>
+
+  <refsect1>
+    <title>Description</title>
+    <para><function>drm_intel_exec_mm</function> starts GPU execution
+    for the context <parameter>ctx</parameter> starting at address
+    <parameter>start</parameter>.  The <parameter>flags</parameter> argument
+    must be <literal>0</literal> or <literal>I915_EXEC_MM_FENCE</literal>.
+    <parameter>ctx</parameter> must be an SVM enabled context (see
+    <citerefentry><refentrytitle>drm_intel_gem_svm_context_create
+    </refentrytitle><manvolnum>3</manvolnum></citerefentry>).
+    </para>
+
+    <para>On success, if the <parameter>flags</parameter> parameter
+    <literal>I915_EXEC_MM_FENCE</literal>, is passed, the function will return
+    an Android Native Sync file descriptor, which can be passed to
+    <citerefentry><refentrytitle>poll</refentrytitle><manvolnum>2</manvolnum>
+    </citerefentry>, or be used for Android Native Sync ioctls such as
+    SYNC_IOC_WAIT and SYNC_IOC_FENCE_INFO.  This fd should be closed when the
+    caller no longer needs it, as with any other fd.  If the
+    <literal>I915_EXEC_MM_FENCE_CLOEXEC</literal> flag is passed, the requested
+    fence will have close-on-exec semantics.
+    </para>
+
+    <para>Note that this function is asynchronous; it will return immediately
+    after queuing the work to the GPU, which may run the code at the given
+    <parameter>start</parameter> address indefinitely (in which case it will
+    be periodically preempted to run other work if the GPU scheduler is
+    available).
+    </para>
+  </refsect1>
+
+  <refsect1>
+    <title>Return Value</title>
+    <para><function>drm_intel_exec_mm</function> returns a file descriptor
+    on success (see above), or an appropriate errno on failure.</para>
+    <para><constant>ENOEXEC</constant> if the batch pointer is not dword aligned.</para>
+    <para><constant>ENODEV</constant> if SVM is not available on the platform.</para>
+    <para><constant>EINVAL</constant> if the context is not SVM aware or flags are invalid.</para>
+    <para><constant>EIO</constant> if there was a ring error or a GPU hang.</para>
+    <para><constant>ENOMEM</constant> if the fence creation failed or internal request creation failed.</para>
+    <para><constant>EINTR</constant> if the function was interrupted.</para>
+    <para><constant>EBUSY</constant> if ring space was not available.</para>
+  </refsect1>
+
+  <refsect1>
+    <title>Reporting Bugs</title>
+    <para>Bugs in this function should be reported to
+          http://bugs.freedesktop.org under the "Mesa" product, with "Other" or
+          "libdrm" as the component.</para>
+  </refsect1>
+
+  <refsect1>
+    <title>See Also</title>
+    <para>
+      <citerefentry><refentrytitle>drm</refentrytitle><manvolnum>7</manvolnum></citerefentry>,
+      <citerefentry><refentrytitle>drm-intel</refentrytitle><manvolnum>7</manvolnum></citerefentry>,
+      <citerefentry><refentrytitle>drm_intel_gem_svm_context_create</refentrytitle><manvolnum>7</manvolnum></citerefentry>,
+      <citerefentry><refentrytitle>android-native-sync</refentrytitle><manvolnum>7</manvolnum></citerefentry>,
+    </para>
+  </refsect1>
+</refentry>