intel: Rename GEN_PERF prefix to INTEL_PERF in source files

export': export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965
grep -E "GEN_PERF" -rIl $SEARCH_PATH | xargs sed -ie "s/GEN_PERF/INTEL_PERF/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10241>

13 files changed, 197 insertions, 197 deletions

diff --git a/src/gallium/drivers/iris/iris_monitor.c b/src/gallium/drivers/iris/iris_monitor.c
index 509ef89c191..b06e5ffeee2 100644
--- a/src/gallium/drivers/iris/iris_monitor.c
+++ b/src/gallium/drivers/iris/iris_monitor.c
@@ -60,23 +60,23 @@ iris_get_monitor_info(struct pipe_screen *pscreen, unsigned index,
    info->name = counter->name;
    info->query_type = PIPE_QUERY_DRIVER_SPECIFIC + index;
 
-   if (counter->type == GEN_PERF_COUNTER_TYPE_THROUGHPUT)
+   if (counter->type == INTEL_PERF_COUNTER_TYPE_THROUGHPUT)
       info->result_type = PIPE_DRIVER_QUERY_RESULT_TYPE_AVERAGE;
    else
       info->result_type = PIPE_DRIVER_QUERY_RESULT_TYPE_CUMULATIVE;
    switch (counter->data_type) {
-   case GEN_PERF_COUNTER_DATA_TYPE_BOOL32:
-   case GEN_PERF_COUNTER_DATA_TYPE_UINT32:
+   case INTEL_PERF_COUNTER_DATA_TYPE_BOOL32:
+   case INTEL_PERF_COUNTER_DATA_TYPE_UINT32:
       info->type = PIPE_DRIVER_QUERY_TYPE_UINT;
       assert(counter->raw_max <= UINT32_MAX);
       info->max_value.u32 = (uint32_t)counter->raw_max;
       break;
-   case GEN_PERF_COUNTER_DATA_TYPE_UINT64:
+   case INTEL_PERF_COUNTER_DATA_TYPE_UINT64:
       info->type = PIPE_DRIVER_QUERY_TYPE_UINT64;
       info->max_value.u64 = counter->raw_max;
       break;
-   case GEN_PERF_COUNTER_DATA_TYPE_FLOAT:
-   case GEN_PERF_COUNTER_DATA_TYPE_DOUBLE:
+   case INTEL_PERF_COUNTER_DATA_TYPE_FLOAT:
+   case INTEL_PERF_COUNTER_DATA_TYPE_DOUBLE:
       info->type = PIPE_DRIVER_QUERY_TYPE_FLOAT;
       info->max_value.f = counter->raw_max;
       break;
@@ -300,17 +300,17 @@ iris_get_monitor_result(struct pipe_context *ctx,
          &info->counters[current_counter];
       assert(intel_perf_query_counter_get_size(counter));
       switch (counter->data_type) {
-      case GEN_PERF_COUNTER_DATA_TYPE_UINT64:
+      case INTEL_PERF_COUNTER_DATA_TYPE_UINT64:
          result[i].u64 = *(uint64_t*)(monitor->result_buffer + counter->offset);
          break;
-      case GEN_PERF_COUNTER_DATA_TYPE_FLOAT:
+      case INTEL_PERF_COUNTER_DATA_TYPE_FLOAT:
          result[i].f = *(float*)(monitor->result_buffer + counter->offset);
          break;
-      case GEN_PERF_COUNTER_DATA_TYPE_UINT32:
-      case GEN_PERF_COUNTER_DATA_TYPE_BOOL32:
+      case INTEL_PERF_COUNTER_DATA_TYPE_UINT32:
+      case INTEL_PERF_COUNTER_DATA_TYPE_BOOL32:
          result[i].u64 = *(uint32_t*)(monitor->result_buffer + counter->offset);
          break;
-      case GEN_PERF_COUNTER_DATA_TYPE_DOUBLE: {
+      case INTEL_PERF_COUNTER_DATA_TYPE_DOUBLE: {
          double v = *(double*)(monitor->result_buffer + counter->offset);
          result[i].f = v;
          break;
diff --git a/src/gallium/drivers/iris/iris_performance_query.c b/src/gallium/drivers/iris/iris_performance_query.c
index 4460be8908b..5008c47f304 100644
--- a/src/gallium/drivers/iris/iris_performance_query.c
+++ b/src/gallium/drivers/iris/iris_performance_query.c
@@ -38,17 +38,17 @@ iris_init_perf_query_info(struct pipe_context *pipe)
    struct intel_perf_config *perf_cfg = NULL;
 
    /* make sure pipe perf counter type/data-type enums are matched with intel_perf's */
-   STATIC_ASSERT(PIPE_PERF_COUNTER_TYPE_EVENT == (enum pipe_perf_counter_type)GEN_PERF_COUNTER_TYPE_EVENT);
-   STATIC_ASSERT(PIPE_PERF_COUNTER_TYPE_DURATION_NORM == (enum pipe_perf_counter_type)GEN_PERF_COUNTER_TYPE_DURATION_NORM);
-   STATIC_ASSERT(PIPE_PERF_COUNTER_TYPE_DURATION_RAW == (enum pipe_perf_counter_type)GEN_PERF_COUNTER_TYPE_DURATION_RAW);
-   STATIC_ASSERT(PIPE_PERF_COUNTER_TYPE_THROUGHPUT == (enum pipe_perf_counter_type)GEN_PERF_COUNTER_TYPE_THROUGHPUT);
-   STATIC_ASSERT(PIPE_PERF_COUNTER_TYPE_RAW == (enum pipe_perf_counter_type)GEN_PERF_COUNTER_TYPE_RAW);
-
-   STATIC_ASSERT(PIPE_PERF_COUNTER_DATA_TYPE_BOOL32 == (enum pipe_perf_counter_data_type)GEN_PERF_COUNTER_DATA_TYPE_BOOL32);
-   STATIC_ASSERT(PIPE_PERF_COUNTER_DATA_TYPE_UINT32 == (enum pipe_perf_counter_data_type)GEN_PERF_COUNTER_DATA_TYPE_UINT32);
-   STATIC_ASSERT(PIPE_PERF_COUNTER_DATA_TYPE_UINT64 == (enum pipe_perf_counter_data_type)GEN_PERF_COUNTER_DATA_TYPE_UINT64);
-   STATIC_ASSERT(PIPE_PERF_COUNTER_DATA_TYPE_FLOAT == (enum pipe_perf_counter_data_type)GEN_PERF_COUNTER_DATA_TYPE_FLOAT);
-   STATIC_ASSERT(PIPE_PERF_COUNTER_DATA_TYPE_DOUBLE == (enum pipe_perf_counter_data_type)GEN_PERF_COUNTER_DATA_TYPE_DOUBLE);
+   STATIC_ASSERT(PIPE_PERF_COUNTER_TYPE_EVENT == (enum pipe_perf_counter_type)INTEL_PERF_COUNTER_TYPE_EVENT);
+   STATIC_ASSERT(PIPE_PERF_COUNTER_TYPE_DURATION_NORM == (enum pipe_perf_counter_type)INTEL_PERF_COUNTER_TYPE_DURATION_NORM);
+   STATIC_ASSERT(PIPE_PERF_COUNTER_TYPE_DURATION_RAW == (enum pipe_perf_counter_type)INTEL_PERF_COUNTER_TYPE_DURATION_RAW);
+   STATIC_ASSERT(PIPE_PERF_COUNTER_TYPE_THROUGHPUT == (enum pipe_perf_counter_type)INTEL_PERF_COUNTER_TYPE_THROUGHPUT);
+   STATIC_ASSERT(PIPE_PERF_COUNTER_TYPE_RAW == (enum pipe_perf_counter_type)INTEL_PERF_COUNTER_TYPE_RAW);
+
+   STATIC_ASSERT(PIPE_PERF_COUNTER_DATA_TYPE_BOOL32 == (enum pipe_perf_counter_data_type)INTEL_PERF_COUNTER_DATA_TYPE_BOOL32);
+   STATIC_ASSERT(PIPE_PERF_COUNTER_DATA_TYPE_UINT32 == (enum pipe_perf_counter_data_type)INTEL_PERF_COUNTER_DATA_TYPE_UINT32);
+   STATIC_ASSERT(PIPE_PERF_COUNTER_DATA_TYPE_UINT64 == (enum pipe_perf_counter_data_type)INTEL_PERF_COUNTER_DATA_TYPE_UINT64);
+   STATIC_ASSERT(PIPE_PERF_COUNTER_DATA_TYPE_FLOAT == (enum pipe_perf_counter_data_type)INTEL_PERF_COUNTER_DATA_TYPE_FLOAT);
+   STATIC_ASSERT(PIPE_PERF_COUNTER_DATA_TYPE_DOUBLE == (enum pipe_perf_counter_data_type)INTEL_PERF_COUNTER_DATA_TYPE_DOUBLE);
 
    if (!ice->perf_ctx)
       ice->perf_ctx = intel_perf_new_context(ice);
diff --git a/src/intel/perf/gen_perf.py b/src/intel/perf/gen_perf.py
index 9c725abc760..3ed0152fdfd 100644
--- a/src/intel/perf/gen_perf.py
+++ b/src/intel/perf/gen_perf.py
@@ -422,9 +422,9 @@ def output_counter_report(set, counter, current_offset):
     c("counter->desc = \"" + counter.get('description') + desc_units(counter.get('units')) + "\";\n")
     c("counter->symbol_name = \"" + counter.get('symbol_name') + "\";\n")
     c("counter->category = \"" + counter.get('mdapi_group') + "\";\n")
-    c("counter->type = GEN_PERF_COUNTER_TYPE_" + semantic_type_uc + ";\n")
-    c("counter->data_type = GEN_PERF_COUNTER_DATA_TYPE_" + data_type_uc + ";\n")
-    c("counter->units = GEN_PERF_COUNTER_UNITS_" + output_units(counter.get('units')) + ";\n")
+    c("counter->type = INTEL_PERF_COUNTER_TYPE_" + semantic_type_uc + ";\n")
+    c("counter->data_type = INTEL_PERF_COUNTER_DATA_TYPE_" + data_type_uc + ";\n")
+    c("counter->units = INTEL_PERF_COUNTER_UNITS_" + output_units(counter.get('units')) + ";\n")
     c("counter->raw_max = " + set.max_values[counter.get('symbol_name')] + ";\n")
 
     current_offset = pot_align(current_offset, sizeof(c_type))
@@ -716,7 +716,7 @@ def main():
             c("struct intel_perf_query_info *query = rzalloc(perf, struct intel_perf_query_info);\n")
             c("\n")
             c("query->perf = perf;\n")
-            c("query->kind = GEN_PERF_QUERY_TYPE_OA;\n")
+            c("query->kind = INTEL_PERF_QUERY_TYPE_OA;\n")
             c("query->name = \"" + set.name + "\";\n")
             c("query->symbol_name = \"" + set.symbol_name + "\";\n")
             c("query->guid = \"" + set.hw_config_guid + "\";\n")
diff --git a/src/intel/perf/intel_perf.c b/src/intel/perf/intel_perf.c
index 71005296532..c4ab6d1c432 100644
--- a/src/intel/perf/intel_perf.c
+++ b/src/intel/perf/intel_perf.c
@@ -508,7 +508,7 @@ load_pipeline_statistic_metrics(struct intel_perf_config *perf_cfg,
    struct intel_perf_query_info *query =
       intel_perf_append_query_info(perf_cfg, MAX_STAT_COUNTERS);
 
-   query->kind = GEN_PERF_QUERY_TYPE_PIPELINE;
+   query->kind = INTEL_PERF_QUERY_TYPE_PIPELINE;
    query->name = "Pipeline Statistics Registers";
 
    intel_perf_query_add_basic_stat_reg(query, IA_VERTICES_COUNT,
@@ -1159,11 +1159,11 @@ query_accumulator_offset(const struct intel_perf_query_info *query,
                          uint8_t index)
 {
    switch (type) {
-   case GEN_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT:
+   case INTEL_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT:
       return query->perfcnt_offset + index;
-   case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
+   case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
       return query->b_offset + index;
-   case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_C:
+   case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_C:
       return query->c_offset + index;
    default:
       unreachable("Invalid register type");
@@ -1184,7 +1184,7 @@ intel_perf_query_result_accumulate_fields(struct intel_perf_query_result *result
    for (uint32_t r = 0; r < layout->n_fields; r++) {
       struct intel_perf_query_field *field = &layout->fields[r];
 
-      if (field->type == GEN_PERF_QUERY_FIELD_TYPE_MI_RPC) {
+      if (field->type == INTEL_PERF_QUERY_FIELD_TYPE_MI_RPC) {
          intel_perf_query_result_read_frequencies(result, devinfo,
                                                 start + field->location,
                                                 end + field->location);
@@ -1217,7 +1217,7 @@ intel_perf_query_result_accumulate_fields(struct intel_perf_query_result *result
          /* RPSTAT is a bit of a special case because its begin/end values
           * represent frequencies. We store it in a separate location.
           */
-         if (field->type == GEN_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT)
+         if (field->type == INTEL_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT)
             intel_perf_query_result_read_gt_frequency(result, devinfo, v0, v1);
          else
             result->accumulator[query_accumulator_offset(query, field->type, field->index)] = v1 - v0;
@@ -1244,15 +1244,15 @@ intel_perf_query_result_print_fields(const struct intel_perf_query_info *query,
       const uint32_t *value32 = data + field->location;
 
       switch (field->type) {
-      case GEN_PERF_QUERY_FIELD_TYPE_MI_RPC:
+      case INTEL_PERF_QUERY_FIELD_TYPE_MI_RPC:
          fprintf(stderr, "MI_RPC:\n");
          fprintf(stderr, "  TS: 0x%08x\n", *(value32 + 1));
          fprintf(stderr, "  CLK: 0x%08x\n", *(value32 + 3));
          break;
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
          fprintf(stderr, "B%u: 0x%08x\n", field->index, *value32);
          break;
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_C:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_C:
          fprintf(stderr, "C%u: 0x%08x\n", field->index, *value32);
          break;
       default:
@@ -1280,7 +1280,7 @@ add_query_register(struct intel_perf_query_field_layout *layout,
    /* Align MI_RPC to 64bytes (HW requirement) & 64bit registers to 8bytes
     * (shows up nicely in the debugger).
     */
-   if (type == GEN_PERF_QUERY_FIELD_TYPE_MI_RPC)
+   if (type == INTEL_PERF_QUERY_FIELD_TYPE_MI_RPC)
       layout->size = align(layout->size, 64);
    else if (size % 8 == 0)
       layout->size = align(layout->size, 8);
@@ -1310,51 +1310,51 @@ intel_perf_init_query_fields(struct intel_perf_config *perf_cfg,
 
    layout->fields = rzalloc_array(perf_cfg, struct intel_perf_query_field, 5 + 16);
 
-   add_query_register(layout, GEN_PERF_QUERY_FIELD_TYPE_MI_RPC,
+   add_query_register(layout, INTEL_PERF_QUERY_FIELD_TYPE_MI_RPC,
                       0, 256, 0);
 
    if (devinfo->ver <= 11) {
       struct intel_perf_query_field *field =
          add_query_register(layout,
-                            GEN_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT,
+                            INTEL_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT,
                             PERF_CNT_1_DW0, 8, 0);
       field->mask = PERF_CNT_VALUE_MASK;
 
       field = add_query_register(layout,
-                                 GEN_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT,
+                                 INTEL_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT,
                                  PERF_CNT_2_DW0, 8, 1);
       field->mask = PERF_CNT_VALUE_MASK;
    }
 
    if (devinfo->ver == 8 && !devinfo->is_cherryview) {
       add_query_register(layout,
-                         GEN_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT,
+                         INTEL_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT,
                          GFX7_RPSTAT1, 4, 0);
    }
 
    if (devinfo->ver >= 9) {
       add_query_register(layout,
-                         GEN_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT,
+                         INTEL_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT,
                          GFX9_RPSTAT0, 4, 0);
    }
 
    if (!can_use_mi_rpc_bc_counters(devinfo)) {
       if (devinfo->ver >= 8 && devinfo->ver <= 11) {
          for (uint32_t i = 0; i < GFX8_N_OA_PERF_B32; i++) {
-            add_query_register(layout, GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_B,
+            add_query_register(layout, INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_B,
                                GFX8_OA_PERF_B32(i), 4, i);
          }
          for (uint32_t i = 0; i < GFX8_N_OA_PERF_C32; i++) {
-            add_query_register(layout, GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_C,
+            add_query_register(layout, INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_C,
                                GFX8_OA_PERF_C32(i), 4, i);
          }
       } else if (devinfo->ver == 12) {
          for (uint32_t i = 0; i < GFX12_N_OAG_PERF_B32; i++) {
-            add_query_register(layout, GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_B,
+            add_query_register(layout, INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_B,
                                GFX12_OAG_PERF_B32(i), 4, i);
          }
          for (uint32_t i = 0; i < GFX12_N_OAG_PERF_C32; i++) {
-            add_query_register(layout, GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_C,
+            add_query_register(layout, INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_C,
                                GFX12_OAG_PERF_C32(i), 4, i);
          }
       }
diff --git a/src/intel/perf/intel_perf.h b/src/intel/perf/intel_perf.h
index 7d0a6e6d804..b40ddd23ff3 100644
--- a/src/intel/perf/intel_perf.h
+++ b/src/intel/perf/intel_perf.h
@@ -47,53 +47,53 @@ struct intel_perf_config;
 struct intel_perf_query_info;
 
 enum intel_perf_counter_type {
-   GEN_PERF_COUNTER_TYPE_EVENT,
-   GEN_PERF_COUNTER_TYPE_DURATION_NORM,
-   GEN_PERF_COUNTER_TYPE_DURATION_RAW,
-   GEN_PERF_COUNTER_TYPE_THROUGHPUT,
-   GEN_PERF_COUNTER_TYPE_RAW,
-   GEN_PERF_COUNTER_TYPE_TIMESTAMP,
+   INTEL_PERF_COUNTER_TYPE_EVENT,
+   INTEL_PERF_COUNTER_TYPE_DURATION_NORM,
+   INTEL_PERF_COUNTER_TYPE_DURATION_RAW,
+   INTEL_PERF_COUNTER_TYPE_THROUGHPUT,
+   INTEL_PERF_COUNTER_TYPE_RAW,
+   INTEL_PERF_COUNTER_TYPE_TIMESTAMP,
 };
 
 enum intel_perf_counter_data_type {
-   GEN_PERF_COUNTER_DATA_TYPE_BOOL32,
-   GEN_PERF_COUNTER_DATA_TYPE_UINT32,
-   GEN_PERF_COUNTER_DATA_TYPE_UINT64,
-   GEN_PERF_COUNTER_DATA_TYPE_FLOAT,
-   GEN_PERF_COUNTER_DATA_TYPE_DOUBLE,
+   INTEL_PERF_COUNTER_DATA_TYPE_BOOL32,
+   INTEL_PERF_COUNTER_DATA_TYPE_UINT32,
+   INTEL_PERF_COUNTER_DATA_TYPE_UINT64,
+   INTEL_PERF_COUNTER_DATA_TYPE_FLOAT,
+   INTEL_PERF_COUNTER_DATA_TYPE_DOUBLE,
 };
 
 enum intel_perf_counter_units {
    /* size */
-   GEN_PERF_COUNTER_UNITS_BYTES,
+   INTEL_PERF_COUNTER_UNITS_BYTES,
 
    /* frequency */
-   GEN_PERF_COUNTER_UNITS_HZ,
+   INTEL_PERF_COUNTER_UNITS_HZ,
 
    /* time */
-   GEN_PERF_COUNTER_UNITS_NS,
-   GEN_PERF_COUNTER_UNITS_US,
+   INTEL_PERF_COUNTER_UNITS_NS,
+   INTEL_PERF_COUNTER_UNITS_US,
 
    /**/
-   GEN_PERF_COUNTER_UNITS_PIXELS,
-   GEN_PERF_COUNTER_UNITS_TEXELS,
-   GEN_PERF_COUNTER_UNITS_THREADS,
-   GEN_PERF_COUNTER_UNITS_PERCENT,
+   INTEL_PERF_COUNTER_UNITS_PIXELS,
+   INTEL_PERF_COUNTER_UNITS_TEXELS,
+   INTEL_PERF_COUNTER_UNITS_THREADS,
+   INTEL_PERF_COUNTER_UNITS_PERCENT,
 
    /* events */
-   GEN_PERF_COUNTER_UNITS_MESSAGES,
-   GEN_PERF_COUNTER_UNITS_NUMBER,
-   GEN_PERF_COUNTER_UNITS_CYCLES,
-   GEN_PERF_COUNTER_UNITS_EVENTS,
-   GEN_PERF_COUNTER_UNITS_UTILIZATION,
+   INTEL_PERF_COUNTER_UNITS_MESSAGES,
+   INTEL_PERF_COUNTER_UNITS_NUMBER,
+   INTEL_PERF_COUNTER_UNITS_CYCLES,
+   INTEL_PERF_COUNTER_UNITS_EVENTS,
+   INTEL_PERF_COUNTER_UNITS_UTILIZATION,
 
    /**/
-   GEN_PERF_COUNTER_UNITS_EU_SENDS_TO_L3_CACHE_LINES,
-   GEN_PERF_COUNTER_UNITS_EU_ATOMIC_REQUESTS_TO_L3_CACHE_LINES,
-   GEN_PERF_COUNTER_UNITS_EU_REQUESTS_TO_L3_CACHE_LINES,
-   GEN_PERF_COUNTER_UNITS_EU_BYTES_PER_L3_CACHE_LINE,
+   INTEL_PERF_COUNTER_UNITS_EU_SENDS_TO_L3_CACHE_LINES,
+   INTEL_PERF_COUNTER_UNITS_EU_ATOMIC_REQUESTS_TO_L3_CACHE_LINES,
+   INTEL_PERF_COUNTER_UNITS_EU_REQUESTS_TO_L3_CACHE_LINES,
+   INTEL_PERF_COUNTER_UNITS_EU_BYTES_PER_L3_CACHE_LINE,
 
-   GEN_PERF_COUNTER_UNITS_MAX
+   INTEL_PERF_COUNTER_UNITS_MAX
 };
 
 struct gen_pipeline_stat {
@@ -211,9 +211,9 @@ struct intel_perf_query_info {
    struct intel_perf_config *perf;
 
    enum intel_perf_query_type {
-      GEN_PERF_QUERY_TYPE_OA,
-      GEN_PERF_QUERY_TYPE_RAW,
-      GEN_PERF_QUERY_TYPE_PIPELINE,
+      INTEL_PERF_QUERY_TYPE_OA,
+      INTEL_PERF_QUERY_TYPE_RAW,
+      INTEL_PERF_QUERY_TYPE_PIPELINE,
    } kind;
    const char *name;
    const char *symbol_name;
@@ -264,11 +264,11 @@ struct intel_perf_query_field_layout {
        * fields)
        */
       enum intel_perf_query_field_type {
-         GEN_PERF_QUERY_FIELD_TYPE_MI_RPC,
-         GEN_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT,
-         GEN_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT,
-         GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_B,
-         GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_C,
+         INTEL_PERF_QUERY_FIELD_TYPE_MI_RPC,
+         INTEL_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT,
+         INTEL_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT,
+         INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_B,
+         INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_C,
       } type;
 
       /* Index of register in the given type (for instance A31 or B2,
@@ -459,15 +459,15 @@ static inline size_t
 intel_perf_query_counter_get_size(const struct intel_perf_query_counter *counter)
 {
    switch (counter->data_type) {
-   case GEN_PERF_COUNTER_DATA_TYPE_BOOL32:
+   case INTEL_PERF_COUNTER_DATA_TYPE_BOOL32:
       return sizeof(uint32_t);
-   case GEN_PERF_COUNTER_DATA_TYPE_UINT32:
+   case INTEL_PERF_COUNTER_DATA_TYPE_UINT32:
       return sizeof(uint32_t);
-   case GEN_PERF_COUNTER_DATA_TYPE_UINT64:
+   case INTEL_PERF_COUNTER_DATA_TYPE_UINT64:
       return sizeof(uint64_t);
-   case GEN_PERF_COUNTER_DATA_TYPE_FLOAT:
+   case INTEL_PERF_COUNTER_DATA_TYPE_FLOAT:
       return sizeof(float);
-   case GEN_PERF_COUNTER_DATA_TYPE_DOUBLE:
+   case INTEL_PERF_COUNTER_DATA_TYPE_DOUBLE:
       return sizeof(double);
    default:
       unreachable("invalid counter data type");
diff --git a/src/intel/perf/intel_perf_mdapi.c b/src/intel/perf/intel_perf_mdapi.c
index 12ed9991b71..6e06e7a2be1 100644
--- a/src/intel/perf/intel_perf_mdapi.c
+++ b/src/intel/perf/intel_perf_mdapi.c
@@ -146,7 +146,7 @@ intel_perf_register_mdapi_statistic_query(struct intel_perf_config *perf_cfg,
    struct intel_perf_query_info *query =
       intel_perf_append_query_info(perf_cfg, MAX_STAT_COUNTERS);
 
-   query->kind = GEN_PERF_QUERY_TYPE_PIPELINE;
+   query->kind = INTEL_PERF_QUERY_TYPE_PIPELINE;
    query->name = "Intel_Raw_Pipeline_Statistics_Query";
 
    /* The order has to match mdapi_pipeline_metrics. */
@@ -205,7 +205,7 @@ fill_mdapi_perf_query_counter(struct intel_perf_query_info *query,
 
    counter->name = name;
    counter->desc = "Raw counter value";
-   counter->type = GEN_PERF_COUNTER_TYPE_RAW;
+   counter->type = INTEL_PERF_COUNTER_TYPE_RAW;
    counter->data_type = data_type;
    counter->offset = data_offset;
 
@@ -219,14 +219,14 @@ fill_mdapi_perf_query_counter(struct intel_perf_query_info *query,
                                  (uint8_t *) &struct_name.field_name -  \
                                  (uint8_t *) &struct_name,              \
                                  sizeof(struct_name.field_name),        \
-                                 GEN_PERF_COUNTER_DATA_TYPE_##type_name)
+                                 INTEL_PERF_COUNTER_DATA_TYPE_##type_name)
 #define MDAPI_QUERY_ADD_ARRAY_COUNTER(ctx, query, struct_name, field_name, idx, type_name) \
    fill_mdapi_perf_query_counter(query,                                 \
                                  ralloc_asprintf(ctx, "%s%i", #field_name, idx), \
                                  (uint8_t *) &struct_name.field_name[idx] - \
                                  (uint8_t *) &struct_name,              \
                                  sizeof(struct_name.field_name[0]),     \
-                                 GEN_PERF_COUNTER_DATA_TYPE_##type_name)
+                                 INTEL_PERF_COUNTER_DATA_TYPE_##type_name)
 
 void
 intel_perf_register_mdapi_oa_query(struct intel_perf_config *perf,
@@ -349,9 +349,9 @@ intel_perf_register_mdapi_oa_query(struct intel_perf_config *perf,
       break;
    }
 
-   query->kind = GEN_PERF_QUERY_TYPE_RAW;
+   query->kind = INTEL_PERF_QUERY_TYPE_RAW;
    query->name = "Intel_Raw_Hardware_Counters_Set_0_Query";
-   query->guid = GEN_PERF_QUERY_GUID_MDAPI;
+   query->guid = INTEL_PERF_QUERY_GUID_MDAPI;
 
    {
       /* Accumulation buffer offsets copied from an actual query... */
diff --git a/src/intel/perf/intel_perf_mdapi.h b/src/intel/perf/intel_perf_mdapi.h
index d85b80cd896..30739bb1639 100644
--- a/src/intel/perf/intel_perf_mdapi.h
+++ b/src/intel/perf/intel_perf_mdapi.h
@@ -31,7 +31,7 @@
 struct intel_perf_query_result;
 
 /* Guid has to matches with MDAPI's. */
-#define GEN_PERF_QUERY_GUID_MDAPI "2f01b241-7014-42a7-9eb6-a925cad3daba"
+#define INTEL_PERF_QUERY_GUID_MDAPI "2f01b241-7014-42a7-9eb6-a925cad3daba"
 
 /*
  * Data format expected by MDAPI.
diff --git a/src/intel/perf/intel_perf_private.h b/src/intel/perf/intel_perf_private.h
index f9c9ce3fd3c..8a88c833dd6 100644
--- a/src/intel/perf/intel_perf_private.h
+++ b/src/intel/perf/intel_perf_private.h
@@ -48,8 +48,8 @@ intel_perf_query_add_stat_reg(struct intel_perf_query_info *query, uint32_t reg,
    counter = &query->counters[query->n_counters];
    counter->name = counter->symbol_name = name;
    counter->desc = description;
-   counter->type = GEN_PERF_COUNTER_TYPE_RAW;
-   counter->data_type = GEN_PERF_COUNTER_DATA_TYPE_UINT64;
+   counter->type = INTEL_PERF_COUNTER_TYPE_RAW;
+   counter->data_type = INTEL_PERF_COUNTER_DATA_TYPE_UINT64;
    counter->offset = sizeof(uint64_t) * query->n_counters;
    counter->pipeline_stat.reg = reg;
    counter->pipeline_stat.numerator = numerator;
diff --git a/src/intel/perf/intel_perf_query.c b/src/intel/perf/intel_perf_query.c
index 2eabd02848f..e6dd869df36 100644
--- a/src/intel/perf/intel_perf_query.c
+++ b/src/intel/perf/intel_perf_query.c
@@ -353,7 +353,7 @@ intel_perf_close(struct intel_perf_context *perfquery,
       close(perfquery->oa_stream_fd);
       perfquery->oa_stream_fd = -1;
    }
-   if (query->kind == GEN_PERF_QUERY_TYPE_RAW) {
+   if (query->kind == INTEL_PERF_QUERY_TYPE_RAW) {
       struct intel_perf_query_info *raw_query =
          (struct intel_perf_query_info *) query;
       raw_query->oa_metrics_set_id = 0;
@@ -425,10 +425,10 @@ get_metric_id(struct intel_perf_config *perf,
    /* These queries are know not to ever change, their config ID has been
     * loaded upon the first query creation. No need to look them up again.
     */
-   if (query->kind == GEN_PERF_QUERY_TYPE_OA)
+   if (query->kind == INTEL_PERF_QUERY_TYPE_OA)
       return query->oa_metrics_set_id;
 
-   assert(query->kind == GEN_PERF_QUERY_TYPE_RAW);
+   assert(query->kind == INTEL_PERF_QUERY_TYPE_RAW);
 
    /* Raw queries can be reprogrammed up by an external application/library.
     * When a raw query is used for the first time it's id is set to a value !=
@@ -531,12 +531,12 @@ intel_perf_active_queries(struct intel_perf_context *perf_ctx,
    assert(perf_ctx->n_active_oa_queries == 0 || perf_ctx->n_active_pipeline_stats_queries == 0);
 
    switch (query->kind) {
-   case GEN_PERF_QUERY_TYPE_OA:
-   case GEN_PERF_QUERY_TYPE_RAW:
+   case INTEL_PERF_QUERY_TYPE_OA:
+   case INTEL_PERF_QUERY_TYPE_RAW:
       return perf_ctx->n_active_oa_queries;
       break;
 
-   case GEN_PERF_QUERY_TYPE_PIPELINE:
+   case INTEL_PERF_QUERY_TYPE_PIPELINE:
       return perf_ctx->n_active_pipeline_stats_queries;
       break;
 
@@ -645,7 +645,7 @@ snapshot_statistics_registers(struct intel_perf_context *ctx,
    for (int i = 0; i < n_counters; i++) {
       const struct intel_perf_query_counter *counter = &query->counters[i];
 
-      assert(counter->data_type == GEN_PERF_COUNTER_DATA_TYPE_UINT64);
+      assert(counter->data_type == INTEL_PERF_COUNTER_DATA_TYPE_UINT64);
 
       perf->vtbl.store_register_mem(ctx->ctx, obj->pipeline_stats.bo,
                                     counter->pipeline_stat.reg, 8,
@@ -667,16 +667,16 @@ snapshot_query_layout(struct intel_perf_context *perf_ctx,
          &layout->fields[end_snapshot ? f : (layout->n_fields - 1 - f)];
 
       switch (field->type) {
-      case GEN_PERF_QUERY_FIELD_TYPE_MI_RPC:
+      case INTEL_PERF_QUERY_FIELD_TYPE_MI_RPC:
          perf_cfg->vtbl.emit_mi_report_perf_count(perf_ctx->ctx, query->oa.bo,
                                                   offset + field->location,
                                                   query->oa.begin_report_id +
                                                   (end_snapshot ? 1 : 0));
          break;
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT:
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT:
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_C:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_C:
          perf_cfg->vtbl.store_register_mem(perf_ctx->ctx, query->oa.bo,
                                            field->mmio_offset, field->size,
                                            offset + field->location);
@@ -735,8 +735,8 @@ intel_perf_begin_query(struct intel_perf_context *perf_ctx,
    perf_cfg->vtbl.emit_stall_at_pixel_scoreboard(perf_ctx->ctx);
 
    switch (queryinfo->kind) {
-   case GEN_PERF_QUERY_TYPE_OA:
-   case GEN_PERF_QUERY_TYPE_RAW: {
+   case INTEL_PERF_QUERY_TYPE_OA:
+   case INTEL_PERF_QUERY_TYPE_RAW: {
 
       /* Opening an i915 perf stream implies exclusive access to the OA unit
        * which will generate counter reports for a specific counter set with a
@@ -873,7 +873,7 @@ intel_perf_begin_query(struct intel_perf_context *perf_ctx,
       break;
    }
 
-   case GEN_PERF_QUERY_TYPE_PIPELINE:
+   case INTEL_PERF_QUERY_TYPE_PIPELINE:
       if (query->pipeline_stats.bo) {
          perf_cfg->vtbl.bo_unreference(query->pipeline_stats.bo);
          query->pipeline_stats.bo = NULL;
@@ -913,8 +913,8 @@ intel_perf_end_query(struct intel_perf_context *perf_ctx,
    perf_cfg->vtbl.emit_stall_at_pixel_scoreboard(perf_ctx->ctx);
 
    switch (query->queryinfo->kind) {
-   case GEN_PERF_QUERY_TYPE_OA:
-   case GEN_PERF_QUERY_TYPE_RAW:
+   case INTEL_PERF_QUERY_TYPE_OA:
+   case INTEL_PERF_QUERY_TYPE_RAW:
 
       /* NB: It's possible that the query will have already been marked
        * as 'accumulated' if an error was seen while reading samples
@@ -932,7 +932,7 @@ intel_perf_end_query(struct intel_perf_context *perf_ctx,
        */
       break;
 
-   case GEN_PERF_QUERY_TYPE_PIPELINE:
+   case INTEL_PERF_QUERY_TYPE_PIPELINE:
       snapshot_statistics_registers(perf_ctx, query,
                                     STATS_BO_END_OFFSET_BYTES);
       --perf_ctx->n_active_pipeline_stats_queries;
@@ -1076,12 +1076,12 @@ intel_perf_wait_query(struct intel_perf_context *perf_ctx,
    struct brw_bo *bo = NULL;
 
    switch (query->queryinfo->kind) {
-   case GEN_PERF_QUERY_TYPE_OA:
-   case GEN_PERF_QUERY_TYPE_RAW:
+   case INTEL_PERF_QUERY_TYPE_OA:
+   case INTEL_PERF_QUERY_TYPE_RAW:
       bo = query->oa.bo;
       break;
 
-   case GEN_PERF_QUERY_TYPE_PIPELINE:
+   case INTEL_PERF_QUERY_TYPE_PIPELINE:
       bo = query->pipeline_stats.bo;
       break;
 
@@ -1110,14 +1110,14 @@ intel_perf_is_query_ready(struct intel_perf_context *perf_ctx,
    struct intel_perf_config *perf_cfg = perf_ctx->perf;
 
    switch (query->queryinfo->kind) {
-   case GEN_PERF_QUERY_TYPE_OA:
-   case GEN_PERF_QUERY_TYPE_RAW:
+   case INTEL_PERF_QUERY_TYPE_OA:
+   case INTEL_PERF_QUERY_TYPE_RAW:
       return (query->oa.results_accumulated ||
               (query->oa.bo &&
                !perf_cfg->vtbl.batch_references(current_batch, query->oa.bo) &&
                !perf_cfg->vtbl.bo_busy(query->oa.bo)));
 
-   case GEN_PERF_QUERY_TYPE_PIPELINE:
+   case INTEL_PERF_QUERY_TYPE_PIPELINE:
       return (query->pipeline_stats.bo &&
               !perf_cfg->vtbl.batch_references(current_batch, query->pipeline_stats.bo) &&
               !perf_cfg->vtbl.bo_busy(query->pipeline_stats.bo));
@@ -1392,8 +1392,8 @@ intel_perf_delete_query(struct intel_perf_context *perf_ctx,
     * deleting an in-flight query object.
     */
    switch (query->queryinfo->kind) {
-   case GEN_PERF_QUERY_TYPE_OA:
-   case GEN_PERF_QUERY_TYPE_RAW:
+   case INTEL_PERF_QUERY_TYPE_OA:
+   case INTEL_PERF_QUERY_TYPE_RAW:
       if (query->oa.bo) {
          if (!query->oa.results_accumulated) {
             drop_from_unaccumulated_query_list(perf_ctx, query);
@@ -1407,7 +1407,7 @@ intel_perf_delete_query(struct intel_perf_context *perf_ctx,
       query->oa.results_accumulated = false;
       break;
 
-   case GEN_PERF_QUERY_TYPE_PIPELINE:
+   case INTEL_PERF_QUERY_TYPE_PIPELINE:
       if (query->pipeline_stats.bo) {
          perf_cfg->vtbl.bo_unreference(query->pipeline_stats.bo);
          query->pipeline_stats.bo = NULL;
@@ -1450,13 +1450,13 @@ get_oa_counter_data(struct intel_perf_context *perf_ctx,
 
       if (counter_size) {
          switch (counter->data_type) {
-         case GEN_PERF_COUNTER_DATA_TYPE_UINT64:
+         case INTEL_PERF_COUNTER_DATA_TYPE_UINT64:
             out_uint64 = (uint64_t *)(data + counter->offset);
             *out_uint64 =
                counter->oa_counter_read_uint64(perf_cfg, queryinfo,
                                                &query->oa.result);
             break;
-         case GEN_PERF_COUNTER_DATA_TYPE_FLOAT:
+         case INTEL_PERF_COUNTER_DATA_TYPE_FLOAT:
             out_float = (float *)(data + counter->offset);
             *out_float =
                counter->oa_counter_read_float(perf_cfg, queryinfo,
@@ -1521,8 +1521,8 @@ intel_perf_get_query_data(struct intel_perf_context *perf_ctx,
    int written = 0;
 
    switch (query->queryinfo->kind) {
-   case GEN_PERF_QUERY_TYPE_OA:
-   case GEN_PERF_QUERY_TYPE_RAW:
+   case INTEL_PERF_QUERY_TYPE_OA:
+   case INTEL_PERF_QUERY_TYPE_RAW:
       if (!query->oa.results_accumulated) {
          /* Due to the sampling frequency of the OA buffer by the i915-perf
           * driver, there can be a 5ms delay between the Mesa seeing the query
@@ -1549,7 +1549,7 @@ intel_perf_get_query_data(struct intel_perf_context *perf_ctx,
          perf_cfg->vtbl.bo_unmap(query->oa.bo);
          query->oa.map = NULL;
       }
-      if (query->queryinfo->kind == GEN_PERF_QUERY_TYPE_OA) {
+      if (query->queryinfo->kind == INTEL_PERF_QUERY_TYPE_OA) {
          written = get_oa_counter_data(perf_ctx, query, data_size, (uint8_t *)data);
       } else {
          const struct intel_device_info *devinfo = perf_ctx->devinfo;
@@ -1560,7 +1560,7 @@ intel_perf_get_query_data(struct intel_perf_context *perf_ctx,
       }
       break;
 
-   case GEN_PERF_QUERY_TYPE_PIPELINE:
+   case INTEL_PERF_QUERY_TYPE_PIPELINE:
       written = get_pipeline_stats_data(perf_ctx, query, data_size, (uint8_t *)data);
       break;
 
@@ -1586,14 +1586,14 @@ intel_perf_dump_query(struct intel_perf_context *ctx,
                       void *current_batch)
 {
    switch (obj->queryinfo->kind) {
-   case GEN_PERF_QUERY_TYPE_OA:
-   case GEN_PERF_QUERY_TYPE_RAW:
+   case INTEL_PERF_QUERY_TYPE_OA:
+   case INTEL_PERF_QUERY_TYPE_RAW:
       DBG("BO: %-4s OA data: %-10s %-15s\n",
           obj->oa.bo ? "yes," : "no,",
           intel_perf_is_query_ready(ctx, obj, current_batch) ? "ready," : "not ready,",
           obj->oa.results_accumulated ? "accumulated" : "not accumulated");
       break;
-   case GEN_PERF_QUERY_TYPE_PIPELINE:
+   case INTEL_PERF_QUERY_TYPE_PIPELINE:
       DBG("BO: %-4s\n",
           obj->pipeline_stats.bo ? "yes" : "no");
       break;
diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c
index 6badd3be31d..f69e178130e 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -1995,8 +1995,8 @@ anv_queue_execbuf_locked(struct anv_queue *queue,
        * OA in that case, so no need to reconfigure.
        */
       if ((INTEL_DEBUG & DEBUG_NO_OACONFIG) == 0 &&
-          (query_info->kind == GEN_PERF_QUERY_TYPE_OA ||
-           query_info->kind == GEN_PERF_QUERY_TYPE_RAW)) {
+          (query_info->kind == INTEL_PERF_QUERY_TYPE_OA ||
+           query_info->kind == INTEL_PERF_QUERY_TYPE_RAW)) {
          int ret = intel_ioctl(device->perf_fd, I915_PERF_IOCTL_CONFIG,
                                (void *)(uintptr_t) query_info->oa_metrics_set_id);
          if (ret < 0) {
diff --git a/src/intel/vulkan/anv_perf.c b/src/intel/vulkan/anv_perf.c
index d0adf5e58d2..bbfd2b34bc4 100644
--- a/src/intel/vulkan/anv_perf.c
+++ b/src/intel/vulkan/anv_perf.c
@@ -82,13 +82,13 @@ anv_physical_device_init_perf(struct anv_physical_device *device, int fd)
       struct intel_perf_query_field *field = &layout->fields[f];
 
       switch (field->type) {
-      case GEN_PERF_QUERY_FIELD_TYPE_MI_RPC:
+      case INTEL_PERF_QUERY_FIELD_TYPE_MI_RPC:
          device->n_perf_query_commands++;
          break;
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT:
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT:
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_C:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_C:
          device->n_perf_query_commands += field->size / 4;
          break;
       }
@@ -226,7 +226,7 @@ VkResult anv_AcquirePerformanceConfigurationINTEL(
    if (!(INTEL_DEBUG & DEBUG_NO_OACONFIG)) {
       config->register_config =
          intel_perf_load_configuration(device->physical->perf, device->fd,
-                                     GEN_PERF_QUERY_GUID_MDAPI);
+                                     INTEL_PERF_QUERY_GUID_MDAPI);
       if (!config->register_config) {
          vk_object_free(&device->vk, NULL, config);
          return VK_INCOMPLETE;
@@ -304,32 +304,32 @@ void anv_UninitializePerformanceApiINTEL(
 /* VK_KHR_performance_query */
 static const VkPerformanceCounterUnitKHR
 intel_perf_counter_unit_to_vk_unit[] = {
-   [GEN_PERF_COUNTER_UNITS_BYTES]                                = VK_PERFORMANCE_COUNTER_UNIT_BYTES_KHR,
-   [GEN_PERF_COUNTER_UNITS_HZ]                                   = VK_PERFORMANCE_COUNTER_UNIT_HERTZ_KHR,
-   [GEN_PERF_COUNTER_UNITS_NS]                                   = VK_PERFORMANCE_COUNTER_UNIT_NANOSECONDS_KHR,
-   [GEN_PERF_COUNTER_UNITS_US]                                   = VK_PERFORMANCE_COUNTER_UNIT_NANOSECONDS_KHR, /* todo */
-   [GEN_PERF_COUNTER_UNITS_PIXELS]                               = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
-   [GEN_PERF_COUNTER_UNITS_TEXELS]                               = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
-   [GEN_PERF_COUNTER_UNITS_THREADS]                              = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
-   [GEN_PERF_COUNTER_UNITS_PERCENT]                              = VK_PERFORMANCE_COUNTER_UNIT_PERCENTAGE_KHR,
-   [GEN_PERF_COUNTER_UNITS_MESSAGES]                             = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
-   [GEN_PERF_COUNTER_UNITS_NUMBER]                               = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
-   [GEN_PERF_COUNTER_UNITS_CYCLES]                               = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
-   [GEN_PERF_COUNTER_UNITS_EVENTS]                               = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
-   [GEN_PERF_COUNTER_UNITS_UTILIZATION]                          = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
-   [GEN_PERF_COUNTER_UNITS_EU_SENDS_TO_L3_CACHE_LINES]           = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
-   [GEN_PERF_COUNTER_UNITS_EU_ATOMIC_REQUESTS_TO_L3_CACHE_LINES] = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
-   [GEN_PERF_COUNTER_UNITS_EU_REQUESTS_TO_L3_CACHE_LINES]        = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
-   [GEN_PERF_COUNTER_UNITS_EU_BYTES_PER_L3_CACHE_LINE]           = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
+   [INTEL_PERF_COUNTER_UNITS_BYTES]                                = VK_PERFORMANCE_COUNTER_UNIT_BYTES_KHR,
+   [INTEL_PERF_COUNTER_UNITS_HZ]                                   = VK_PERFORMANCE_COUNTER_UNIT_HERTZ_KHR,
+   [INTEL_PERF_COUNTER_UNITS_NS]                                   = VK_PERFORMANCE_COUNTER_UNIT_NANOSECONDS_KHR,
+   [INTEL_PERF_COUNTER_UNITS_US]                                   = VK_PERFORMANCE_COUNTER_UNIT_NANOSECONDS_KHR, /* todo */
+   [INTEL_PERF_COUNTER_UNITS_PIXELS]                               = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
+   [INTEL_PERF_COUNTER_UNITS_TEXELS]                               = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
+   [INTEL_PERF_COUNTER_UNITS_THREADS]                              = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
+   [INTEL_PERF_COUNTER_UNITS_PERCENT]                              = VK_PERFORMANCE_COUNTER_UNIT_PERCENTAGE_KHR,
+   [INTEL_PERF_COUNTER_UNITS_MESSAGES]                             = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
+   [INTEL_PERF_COUNTER_UNITS_NUMBER]                               = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
+   [INTEL_PERF_COUNTER_UNITS_CYCLES]                               = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
+   [INTEL_PERF_COUNTER_UNITS_EVENTS]                               = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
+   [INTEL_PERF_COUNTER_UNITS_UTILIZATION]                          = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
+   [INTEL_PERF_COUNTER_UNITS_EU_SENDS_TO_L3_CACHE_LINES]           = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
+   [INTEL_PERF_COUNTER_UNITS_EU_ATOMIC_REQUESTS_TO_L3_CACHE_LINES] = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
+   [INTEL_PERF_COUNTER_UNITS_EU_REQUESTS_TO_L3_CACHE_LINES]        = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
+   [INTEL_PERF_COUNTER_UNITS_EU_BYTES_PER_L3_CACHE_LINE]           = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR,
 };
 
 static const VkPerformanceCounterStorageKHR
 intel_perf_counter_data_type_to_vk_storage[] = {
-   [GEN_PERF_COUNTER_DATA_TYPE_BOOL32] = VK_PERFORMANCE_COUNTER_STORAGE_UINT32_KHR,
-   [GEN_PERF_COUNTER_DATA_TYPE_UINT32] = VK_PERFORMANCE_COUNTER_STORAGE_UINT32_KHR,
-   [GEN_PERF_COUNTER_DATA_TYPE_UINT64] = VK_PERFORMANCE_COUNTER_STORAGE_UINT64_KHR,
-   [GEN_PERF_COUNTER_DATA_TYPE_FLOAT]  = VK_PERFORMANCE_COUNTER_STORAGE_FLOAT32_KHR,
-   [GEN_PERF_COUNTER_DATA_TYPE_DOUBLE] = VK_PERFORMANCE_COUNTER_STORAGE_FLOAT64_KHR,
+   [INTEL_PERF_COUNTER_DATA_TYPE_BOOL32] = VK_PERFORMANCE_COUNTER_STORAGE_UINT32_KHR,
+   [INTEL_PERF_COUNTER_DATA_TYPE_UINT32] = VK_PERFORMANCE_COUNTER_STORAGE_UINT32_KHR,
+   [INTEL_PERF_COUNTER_DATA_TYPE_UINT64] = VK_PERFORMANCE_COUNTER_STORAGE_UINT64_KHR,
+   [INTEL_PERF_COUNTER_DATA_TYPE_FLOAT]  = VK_PERFORMANCE_COUNTER_STORAGE_FLOAT32_KHR,
+   [INTEL_PERF_COUNTER_DATA_TYPE_DOUBLE] = VK_PERFORMANCE_COUNTER_STORAGE_FLOAT64_KHR,
 };
 
 VkResult anv_EnumeratePhysicalDeviceQueueFamilyPerformanceQueryCountersKHR(
@@ -438,23 +438,23 @@ anv_perf_write_pass_results(struct intel_perf_config *perf,
          continue;
 
       switch (pool->pass_query[pass]->kind) {
-      case GEN_PERF_QUERY_TYPE_PIPELINE: {
-         assert(counter_pass->counter->data_type == GEN_PERF_COUNTER_DATA_TYPE_UINT64);
+      case INTEL_PERF_QUERY_TYPE_PIPELINE: {
+         assert(counter_pass->counter->data_type == INTEL_PERF_COUNTER_DATA_TYPE_UINT64);
          uint32_t accu_offset = counter_pass->counter->offset / sizeof(uint64_t);
          results[c].uint64 = accumulated_results->accumulator[accu_offset];
          break;
       }
 
-      case GEN_PERF_QUERY_TYPE_OA:
-      case GEN_PERF_QUERY_TYPE_RAW:
+      case INTEL_PERF_QUERY_TYPE_OA:
+      case INTEL_PERF_QUERY_TYPE_RAW:
          switch (counter_pass->counter->data_type) {
-         case GEN_PERF_COUNTER_DATA_TYPE_UINT64:
+         case INTEL_PERF_COUNTER_DATA_TYPE_UINT64:
             results[c].uint64 =
                counter_pass->counter->oa_counter_read_uint64(perf,
                                                              counter_pass->query,
                                                              accumulated_results);
             break;
-         case GEN_PERF_COUNTER_DATA_TYPE_FLOAT:
+         case INTEL_PERF_COUNTER_DATA_TYPE_FLOAT:
             results[c].float32 =
                counter_pass->counter->oa_counter_read_float(perf,
                                                             counter_pass->query,
@@ -471,8 +471,8 @@ anv_perf_write_pass_results(struct intel_perf_config *perf,
       }
 
       /* The Vulkan extension only has nanoseconds as a unit */
-      if (counter_pass->counter->units == GEN_PERF_COUNTER_UNITS_US) {
-         assert(counter_pass->counter->data_type == GEN_PERF_COUNTER_DATA_TYPE_UINT64);
+      if (counter_pass->counter->units == INTEL_PERF_COUNTER_UNITS_US) {
+         assert(counter_pass->counter->data_type == INTEL_PERF_COUNTER_DATA_TYPE_UINT64);
          results[c].uint64 *= 1000;
       }
    }
diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c
index 44814876127..10cbe62950c 100644
--- a/src/intel/vulkan/genX_query.c
+++ b/src/intel/vulkan/genX_query.c
@@ -860,16 +860,16 @@ emit_perf_intel_query(struct anv_cmd_buffer *cmd_buffer,
          &layout->fields[end ? f : (layout->n_fields - 1 - f)];
 
       switch (field->type) {
-      case GEN_PERF_QUERY_FIELD_TYPE_MI_RPC:
+      case INTEL_PERF_QUERY_FIELD_TYPE_MI_RPC:
          anv_batch_emit(&cmd_buffer->batch, GENX(MI_REPORT_PERF_COUNT), rpc) {
             rpc.MemoryAddress = anv_address_add(data_addr, field->location);
          }
          break;
 
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT:
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT:
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
-      case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_C: {
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
+      case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_C: {
          struct anv_address addr = anv_address_add(data_addr, field->location);
          struct mi_value src = field->size == 8 ?
             mi_reg64(field->mmio_offset) :
@@ -962,7 +962,7 @@ void genX(CmdBeginQueryIndexedEXT)(
                   mi_reg64(ANV_PERF_QUERY_OFFSET_REG));
             cmd_buffer->self_mod_locations[reloc_idx++] = mi_store_address(&b, reg_addr);
 
-            if (field->type != GEN_PERF_QUERY_FIELD_TYPE_MI_RPC &&
+            if (field->type != INTEL_PERF_QUERY_FIELD_TYPE_MI_RPC &&
                 field->size == 8) {
                reg_addr =
                   mi_iadd(
@@ -1004,7 +1004,7 @@ void genX(CmdBeginQueryIndexedEXT)(
          void *dws;
 
          switch (field->type) {
-         case GEN_PERF_QUERY_FIELD_TYPE_MI_RPC:
+         case INTEL_PERF_QUERY_FIELD_TYPE_MI_RPC:
             dws = anv_batch_emitn(&cmd_buffer->batch,
                                   GENX(MI_REPORT_PERF_COUNT_length),
                                   GENX(MI_REPORT_PERF_COUNT),
@@ -1015,10 +1015,10 @@ void genX(CmdBeginQueryIndexedEXT)(
                                       GENX(MI_REPORT_PERF_COUNT_MemoryAddress_start) / 8);
             break;
 
-         case GEN_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT:
-         case GEN_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT:
-         case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
-         case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_C:
+         case INTEL_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT:
+         case INTEL_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT:
+         case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
+         case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_C:
             dws =
                anv_batch_emitn(&cmd_buffer->batch,
                                GENX(MI_STORE_REGISTER_MEM_length),
@@ -1141,7 +1141,7 @@ void genX(CmdEndQueryIndexedEXT)(
          const struct intel_perf_query_field *field = &layout->fields[r];
 
          switch (field->type) {
-         case GEN_PERF_QUERY_FIELD_TYPE_MI_RPC:
+         case INTEL_PERF_QUERY_FIELD_TYPE_MI_RPC:
             dws = anv_batch_emitn(&cmd_buffer->batch,
                                   GENX(MI_REPORT_PERF_COUNT_length),
                                   GENX(MI_REPORT_PERF_COUNT),
@@ -1152,10 +1152,10 @@ void genX(CmdEndQueryIndexedEXT)(
                                       GENX(MI_REPORT_PERF_COUNT_MemoryAddress_start) / 8);
             break;
 
-         case GEN_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT:
-         case GEN_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT:
-         case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
-         case GEN_PERF_QUERY_FIELD_TYPE_SRM_OA_C:
+         case INTEL_PERF_QUERY_FIELD_TYPE_SRM_PERFCNT:
+         case INTEL_PERF_QUERY_FIELD_TYPE_SRM_RPSTAT:
+         case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_B:
+         case INTEL_PERF_QUERY_FIELD_TYPE_SRM_OA_C:
             dws =
                anv_batch_emitn(&cmd_buffer->batch,
                                GENX(MI_STORE_REGISTER_MEM_length),
diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c
index 93d9ea74924..51b8c975bf3 100644
--- a/src/mesa/drivers/dri/i965/brw_performance_query.c
+++ b/src/mesa/drivers/dri/i965/brw_performance_query.c
@@ -160,12 +160,12 @@ static GLuint
 intel_counter_type_enum_to_gl_type(enum intel_perf_counter_type type)
 {
    switch (type) {
-   case GEN_PERF_COUNTER_TYPE_EVENT: return GL_PERFQUERY_COUNTER_EVENT_INTEL;
-   case GEN_PERF_COUNTER_TYPE_DURATION_NORM: return GL_PERFQUERY_COUNTER_DURATION_NORM_INTEL;
-   case GEN_PERF_COUNTER_TYPE_DURATION_RAW: return GL_PERFQUERY_COUNTER_DURATION_RAW_INTEL;
-   case GEN_PERF_COUNTER_TYPE_THROUGHPUT: return GL_PERFQUERY_COUNTER_THROUGHPUT_INTEL;
-   case GEN_PERF_COUNTER_TYPE_RAW: return GL_PERFQUERY_COUNTER_RAW_INTEL;
-   case GEN_PERF_COUNTER_TYPE_TIMESTAMP: return GL_PERFQUERY_COUNTER_TIMESTAMP_INTEL;
+   case INTEL_PERF_COUNTER_TYPE_EVENT: return GL_PERFQUERY_COUNTER_EVENT_INTEL;
+   case INTEL_PERF_COUNTER_TYPE_DURATION_NORM: return GL_PERFQUERY_COUNTER_DURATION_NORM_INTEL;
+   case INTEL_PERF_COUNTER_TYPE_DURATION_RAW: return GL_PERFQUERY_COUNTER_DURATION_RAW_INTEL;
+   case INTEL_PERF_COUNTER_TYPE_THROUGHPUT: return GL_PERFQUERY_COUNTER_THROUGHPUT_INTEL;
+   case INTEL_PERF_COUNTER_TYPE_RAW: return GL_PERFQUERY_COUNTER_RAW_INTEL;
+   case INTEL_PERF_COUNTER_TYPE_TIMESTAMP: return GL_PERFQUERY_COUNTER_TIMESTAMP_INTEL;
    default:
       unreachable("Unknown counter type");
    }
@@ -175,11 +175,11 @@ static GLuint
 gen_counter_data_type_to_gl_type(enum intel_perf_counter_data_type type)
 {
    switch (type) {
-   case GEN_PERF_COUNTER_DATA_TYPE_BOOL32: return GL_PERFQUERY_COUNTER_DATA_BOOL32_INTEL;
-   case GEN_PERF_COUNTER_DATA_TYPE_UINT32: return GL_PERFQUERY_COUNTER_DATA_UINT32_INTEL;
-   case GEN_PERF_COUNTER_DATA_TYPE_UINT64: return GL_PERFQUERY_COUNTER_DATA_UINT64_INTEL;
-   case GEN_PERF_COUNTER_DATA_TYPE_FLOAT: return GL_PERFQUERY_COUNTER_DATA_FLOAT_INTEL;
-   case GEN_PERF_COUNTER_DATA_TYPE_DOUBLE: return GL_PERFQUERY_COUNTER_DATA_DOUBLE_INTEL;
+   case INTEL_PERF_COUNTER_DATA_TYPE_BOOL32: return GL_PERFQUERY_COUNTER_DATA_BOOL32_INTEL;
+   case INTEL_PERF_COUNTER_DATA_TYPE_UINT32: return GL_PERFQUERY_COUNTER_DATA_UINT32_INTEL;
+   case INTEL_PERF_COUNTER_DATA_TYPE_UINT64: return GL_PERFQUERY_COUNTER_DATA_UINT64_INTEL;
+   case INTEL_PERF_COUNTER_DATA_TYPE_FLOAT: return GL_PERFQUERY_COUNTER_DATA_FLOAT_INTEL;
+   case INTEL_PERF_COUNTER_DATA_TYPE_DOUBLE: return GL_PERFQUERY_COUNTER_DATA_DOUBLE_INTEL;
    default:
       unreachable("Unknown counter data type");
    }