/*
 * Copyright © 2009 Jerome Glisse <glisse@freedesktop.org>
 *
 * This file is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License
 * as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software Foundation,
 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
 */
#include "config.h"
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <unistd.h>
#include <string.h>
#include <errno.h>
#include "r600_winsys.h"
#include "r600_clear.h"
#include "radeon.h"

int r600_winsys_init(struct r600_winsys **rdev, struct radeon_bo_manager *bom, int fd);
void r600_winsys_release(struct r600_winsys *rdev);

int main(void)
{
	struct radeon radeon;
	struct r600_winsys *rw;
	struct r600_framebuffer fb;
	struct r600_atom *fbatom;
	struct r600_request rq;
	struct r600_clear_data rclear;
	float rgba[4] = {1.0f, 0.0f, 0.0f, 1.0f};
	int r, w, h;
	int i;

	r = radeon_init(&radeon);
	if (r) {
		radeon_fini(&radeon);
		return r;
	}
	memset_bo(radeon.mode.bo, 0x000000FF);
	r = r600_winsys_init(&rw, radeon.bom, radeon.fd);
	if (r)
		return r;
	w = radeon.mode.pitch / 4;
	h = radeon.mode.height;
	r = r600_clear_init(rw, radeon.bom, &rclear);
	if (r)
		return r;
	/* build cb */
	fb.width = w;
	fb.height = h;
	fb.ncb = 1;
	fb.cb[0].width = w;
	fb.cb[0].height = h;
	fb.cb[0].nsamples = 1;
	fb.cb[0].cb_target_mask = 0xF;
	fb.cb[0].cb_shader_mask = 0xF;
	fb.cb[0].color_info = 0x08110068;
	fb.cb[0].placements[0] = RADEON_GEM_DOMAIN_VRAM;
	fb.cb[0].placements[1] = 0;
	fb.cb[0].handle = radeon.mode.bo->handle;
	fb.db_handle = 0;
	fb.db_depth_size = 0;
	fb.db_depth_view = 0;
	fb.db_depth_info = 0;
	fb.db_htile_surface = 0;
	fb.db_prefetch_limit = 0;
	rq.type = R600_ATOM_FRAMEBUFFER;
	rq.bo[0] = radeon.mode.bo;
	rq.nbo = 1;
	rq.data = &fb;
	fbatom = r600_atom_create(rw, &rq);
	rclear.batch.scissor = NULL;
	r = r600_clear_queue(rw, fbatom, &rclear, 1, rgba, 0.0f, 0);
	if (r)
		return r;
	r600_clear_destroy(&rclear);
	r600_atom_destroy(fbatom);
	r600_winsys_release(rw);
	getchar();
	radeon_fini(&radeon);
	return 0;
}