Age | Commit message (Collapse) | Author | Files | Lines |
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Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Zhao Halley <halley.zhao@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Dmitry Ermilov <dmitry.ermilov@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Dmitry Ermilov <dmitry.ermilov@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Add a few helpers to open shared libraries and load specific symbols
from there.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Currently the HW only supprts JPEG baseline decoding
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Zhang, Ouping <ouping.zhang@intel.com>
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Tested on SNB and IVB.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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By default, newer automake versions make tar use the ancient tar V7 format
that limits filenames to 99 characters. This is troublesome for certain shader
sources files. Now require automake 1.9 and use the tar-ustar option so that
a newer format, defined in POSIX 1003.1-1988, is used. The limitation is now
256 characters.
PAX interchange format (POSIX 1003.1-2001) was considered but probably still
to young? Just stick to the intermediate format for now as this is enough for
our purposes.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Fix decoding of 4K videos on Ivy Bridge. Note that either dimension
shall not exceed 4096 pixels.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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The width is specified in units of pixel.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Some new filters are added in va_vpp.h
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Upload quantiser and Huffman tables only if they are marked as dirty.
i.e. the user requested to load them.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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(cherry picked from commit 25673c458932caa09ae3f47c6dbe7e040dbae032)
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gen6_mfc.c: In function ‘gen6_mfc_brc_init’:
gen6_mfc.c:814:44: warning: initialization from incompatible pointer type [enabled by default]
gen6_mfc.c: In function ‘gen6_mfc_avc_prepare’:
gen6_mfc.c:1058:18: warning: unused variable ‘rate_control_mode’ [-Wunused-variable]
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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It reduces the number of recoding as well.
Signed-off-by: Rogozhkin, Dmitry V <dmitry.v.rogozhkin@intel.com>
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Check the returned status as well.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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The encoded frame includes not only all macroblocks,
but also PPS/SPS/Slice headers.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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The QP specified in MFX_AVC_SLICE_STATE is also used as the starting
QP in the first MB of a slice. In addition, add assertions for QP releated
setting for 8-bit pixel bit-depth support
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Rogozhkin, Dmitry V <dmitry.v.rogozhkin@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Dmitry Ermilov <dmitry.ermilov@intel.com>
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It is the same of commit fd9c532
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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The DNDI kernel is still inapplicable.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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