diff options
| author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2015-03-06 14:21:25 +0200 |
|---|---|---|
| committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2016-04-21 08:37:06 +0300 |
| commit | 135f00e666fdc505d8b3f68cd673cde736ea35ee (patch) | |
| tree | 55a3805168e28628729f0b5d0ca163b868195718 | |
| parent | 395abb9c3b8b7b1a3e757e6dfee5b23cf9cf5753 (diff) | |
i965/blorp/gen6: Prepare vertex buffer setup logic for gen8
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen6_blorp.cpp | 30 |
1 files changed, 22 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index f3ce42c7c9..d635962e7b 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -95,19 +95,33 @@ gen6_blorp_emit_vertex_buffer_state(struct brw_context *brw, if (brw->gen >= 7) dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE; - if (brw->gen == 7) + switch (brw->gen) { + case 7: dw0 |= GEN7_MOCS_L3 << 16; + break; + case 8: + dw0 |= BDW_MOCS_WB << 16; + break; + case 9: + dw0 |= SKL_MOCS_WB << 16; + break; + } BEGIN_BATCH(batch_length); OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (batch_length - 2)); OUT_BATCH(dw0); - /* start address */ - OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, - vertex_offset); - /* end address */ - OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, - vertex_offset + vbo_size - 1); - OUT_BATCH(0); + if (brw->gen >= 8) { + OUT_RELOC64(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, vertex_offset); + OUT_BATCH(vbo_size); + } else { + /* start address */ + OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, + vertex_offset); + /* end address */ + OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, + vertex_offset + vbo_size - 1); + OUT_BATCH(0); + } ADVANCE_BATCH(); } |