diff options
| author | Edward O'Callaghan <funfunctor@folklore1984.net> | 2017-05-02 17:26:21 +1000 |
|---|---|---|
| committer | Edward O'Callaghan <funfunctor@folklore1984.net> | 2017-05-02 21:47:08 +1000 |
| commit | 81e5acaecb4fdd72017905a3570a748011dba239 (patch) | |
| tree | 3f96aa32aee14643b1e5e8ca18551409141b36e0 | |
| parent | e51ec30f68020c79d31f5eb20dd91f07d93862b6 (diff) | |
drm/amdgpu: Fix native dp_aux_transfer impl registers&&offsets
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_dp_auxch.c | 30 |
1 files changed, 16 insertions, 14 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dp_auxch.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dp_auxch.c index 596020421c3d..27dddad869f4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dp_auxch.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dp_auxch.c @@ -26,9 +26,12 @@ #include <drm/drmP.h> #include <drm/amdgpu_drm.h> #include "amdgpu.h" +#include "dce/dce_11_0_d.h" -/* extracted from: 'drivers/gpu/drm/radeon/nid.h' */ -#define AUX_CONTROL 0x6200 +/* extracted from: 'drivers/gpu/drm/radeon/nid.h', where + * registers and offsets were adjusted as-per 'dce/dce_11_0_d.h'. + */ +#define AUX_CONTROL mmAUX_CONTROL #define AUX_EN (1 << 0) #define AUX_LS_READ_EN (1 << 8) #define AUX_LS_UPDATE_DISABLE(x) (((x) & 0x1) << 12) @@ -38,19 +41,19 @@ #define AUX_IMPCAL_REQ_EN (1 << 24) #define AUX_TEST_MODE (1 << 28) #define AUX_DEGLITCH_EN (1 << 29) -#define AUX_SW_CONTROL 0x6204 +#define AUX_SW_CONTROL mmAUX_SW_CONTROL #define AUX_SW_GO (1 << 0) #define AUX_LS_READ_TRIG (1 << 2) #define AUX_SW_START_DELAY(x) (((x) & 0xf) << 4) #define AUX_SW_WR_BYTES(x) (((x) & 0x1f) << 16) -#define AUX_SW_INTERRUPT_CONTROL 0x620c +#define AUX_SW_INTERRUPT_CONTROL mmAUX_INTERRUPT_CONTROL #define AUX_SW_DONE_INT (1 << 0) #define AUX_SW_DONE_ACK (1 << 1) #define AUX_SW_DONE_MASK (1 << 2) #define AUX_SW_LS_DONE_INT (1 << 4) #define AUX_SW_LS_DONE_MASK (1 << 6) -#define AUX_SW_STATUS 0x6210 +#define AUX_SW_STATUS mmAUX_SW_STATUS #define AUX_SW_DONE (1 << 0) #define AUX_SW_REQ (1 << 1) #define AUX_SW_RX_TIMEOUT_STATE(x) (((x) & 0x7) << 4) @@ -68,7 +71,7 @@ #define AUX_SW_RX_RECV_INVALID_H (1 << 22) #define AUX_SW_RX_RECV_INVALID_V (1 << 23) -#define AUX_SW_DATA 0x6218 +#define AUX_SW_DATA mmAUX_SW_DATA #define AUX_SW_DATA_RW (1 << 0) #define AUX_SW_DATA_MASK(x) (((x) & 0xff) << 8) #define AUX_SW_DATA_INDEX(x) (((x) & 0x1f) << 16) @@ -96,14 +99,13 @@ * It is given in number of 32-bit registers, so it needs to be multiplied by * 4 before converting it to an address offset. */ -static const u32 aux_offset[] = -{ - 0x6200 - 0x6200, - 0x6250 - 0x6200, - 0x62a0 - 0x6200, - 0x6300 - 0x6200, - 0x6350 - 0x6200, - 0x63a0 - 0x6200, +static const u32 aux_offset[] = { + mmDP_AUX0_AUX_CONTROL - mmAUX_CONTROL, + mmDP_AUX1_AUX_CONTROL - mmAUX_CONTROL, + mmDP_AUX2_AUX_CONTROL - mmAUX_CONTROL, + mmDP_AUX3_AUX_CONTROL - mmAUX_CONTROL, + mmDP_AUX4_AUX_CONTROL - mmAUX_CONTROL, + mmDP_AUX5_AUX_CONTROL - mmAUX_CONTROL }; ssize_t |