diff options
| author | Anuj Phogat <anuj.phogat@gmail.com> | 2016-02-11 12:36:31 -0800 |
|---|---|---|
| committer | Ben Widawsky <ben@bwidawsk.net> | 2017-03-29 17:06:29 -0700 |
| commit | 7bd6ddfcb21d2d006d30140e7535548d9a92f525 (patch) | |
| tree | 8b354eef6747eabd4ec6e71bf68f23199372db0e | |
| parent | 0897b8c33411d6dca7f3d930cb209e9aec81562c (diff) | |
i965: Add brw defines for astc 3d surface formats
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index b51fce79df..4ee4a69580 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -545,6 +545,28 @@ #define BRW_SURFACEFORMAT_ASTC_LDR_2D_12x10_FLT16 0x27E #define BRW_SURFACEFORMAT_ASTC_LDR_2D_12x12_FLT16 0x27F +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_3x3x3_U8sRGB 0x280 +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_4x3x3_U8sRGB 0x290 +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_4x4x3_U8sRGB 0x294 +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_4x4x4_U8sRGB 0x295 +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_5x4x4_U8sRGB 0x2A5 +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_5x5x4_U8sRGB 0x2A9 +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_5x5x5_U8sRGB 0x2AA +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_6x5x5_U8sRGB 0x2BA +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_6x6x5_U8sRGB 0x2BE +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_6x6x6_U8sRGB 0x2BF + +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_3x3x3_FLT16 0x2C0 +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_4x3x3_FLT16 0x2D0 +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_4x4x3_FLT16 0x2D4 +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_4x4x4_FLT16 0x2D5 +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_5x4x4_FLT16 0x2E5 +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_5x5x4_FLT16 0x2E9 +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_5x5x5_FLT16 0x2EA +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_6x5x5_FLT16 0x2FA +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_6x6x5_FLT16 0x2FE +#define BRW_SURFACEFORMAT_ASTC_LDR_3D_6x6x6_FLT16 0x2FF + #define BRW_SURFACE_FORMAT_SHIFT 18 #define BRW_SURFACE_FORMAT_MASK INTEL_MASK(26, 18) |