rendercopy_gen8: Reorder state emission

This patch attempts to logically reoder the state setup for the 3d
engine. It is designed to somewhat match mesa, though it diverges a big
(I chose to keep the per unit setup as contained as possible).

While here, add the missing:
3DSTATE_WM_CHROMAKEY
3DSTATE_VF
3DSTATE_VF_SGVS

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

2 files changed, 72 insertions, 38 deletions

diff --git a/lib/gen8_render.h b/lib/gen8_render.h
index fffc1007..36ccb5c3 100644
--- a/lib/gen8_render.h
+++ b/lib/gen8_render.h
@@ -8,6 +8,9 @@
 #define GEN7_3DSTATE_URB_DS (0x7832 << 16)
 #define GEN7_3DSTATE_URB_GS (0x7833 << 16)
 
+#define HSW_3DSTATE_VF				GEN6_3D(3, 0, 0xc)
+#define GEN8_3DSTATE_VF_SGVS			GEN6_3D(3, 0, 0x4a)
+
 #define GEN6_3DSTATE_SCISSOR_STATE_POINTERS	GEN6_3D(3, 0, 0xf)
 #define GEN7_3DSTATE_CLEAR_PARAMS		GEN6_3D(3, 0, 0x04)
 #define GEN7_3DSTATE_DEPTH_BUFFER		GEN6_3D(3, 0, 0x05)
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index 767c51d4..133c3c7f 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -497,20 +497,6 @@ gen8_emit_sip(struct intel_batchbuffer *batch) {
 }
 
 static void
-gen7_emit_push_constants(struct intel_batchbuffer *batch) {
-	OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS);
-	OUT_BATCH(0);
-	OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS);
-	OUT_BATCH(0);
-	OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS);
-	OUT_BATCH(0);
-	OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS);
-	OUT_BATCH(0);
-	OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS);
-	OUT_BATCH(0);
-}
-
-static void
 gen8_emit_state_base_address(struct intel_batchbuffer *batch) {
 	OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (16 - 2));
 
@@ -594,6 +580,9 @@ gen8_emit_vs(struct intel_batchbuffer *batch) {
 	OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS);
 	OUT_BATCH(0);
 
+	OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS);
+	OUT_BATCH(0);
+
 	OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | (11 - 2));
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -650,6 +639,9 @@ gen8_emit_hs(struct intel_batchbuffer *batch) {
 
 static void
 gen8_emit_gs(struct intel_batchbuffer *batch) {
+	OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS);
+	OUT_BATCH(0);
+
 	OUT_BATCH(GEN7_3DSTATE_CONSTANT_GS | (11 - 2));
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -682,6 +674,9 @@ gen8_emit_gs(struct intel_batchbuffer *batch) {
 
 static void
 gen8_emit_ds(struct intel_batchbuffer *batch) {
+	OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS);
+	OUT_BATCH(0);
+
 	OUT_BATCH(GEN7_3DSTATE_CONSTANT_DS | (11 - 2));
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -712,25 +707,40 @@ gen8_emit_ds(struct intel_batchbuffer *batch) {
 }
 
 static void
+gen8_emit_te(struct intel_batchbuffer *batch)
+{
+	OUT_BATCH(GEN7_3DSTATE_TE | (4-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+}
+
+static void
 gen8_emit_wm_hz_op(struct intel_batchbuffer *batch) {
 	OUT_BATCH(GEN8_3DSTATE_WM_HZ_OP | (5-2));
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
+
+	OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS);
+	OUT_BATCH(0);
 }
 
 static void
-gen8_emit_null_state(struct intel_batchbuffer *batch) {
+gen8_emit_null_state(struct intel_batchbuffer *batch)
+{
 	gen8_emit_wm_hz_op(batch);
 	gen8_emit_hs(batch);
-	OUT_BATCH(GEN7_3DSTATE_TE | (4-2));
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
+	gen8_emit_te(batch);
 	gen8_emit_gs(batch);
 	gen8_emit_ds(batch);
 	gen8_emit_vs(batch);
+
+	BEGIN_BATCH(2);
+	OUT_BATCH((0x784c << 16) | (2 - 2));
+	OUT_BATCH(0);
+	ADVANCE_BATCH();
 }
 
 static void
@@ -783,6 +793,9 @@ gen8_emit_ps(struct intel_batchbuffer *batch, uint32_t kernel) {
 		   * expect (g6, see below) */
 		  GEN7_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC);
 
+	OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS);
+	OUT_BATCH(0);
+
 	OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (11-2));
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -861,6 +874,9 @@ static void gen8_emit_vf_topology(struct intel_batchbuffer *batch)
 {
 	OUT_BATCH(GEN8_3DSTATE_VF_TOPOLOGY);
 	OUT_BATCH(_3DPRIM_RECTLIST);
+
+	OUT_BATCH(GEN8_3DSTATE_VF_SGVS | (2 - 2));
+	OUT_BATCH(0);
 }
 
 /* Vertex elements MUST be defined before this according to spec */
@@ -962,13 +978,6 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D);
 	gen8_emit_sip(batch);
 
-	/* mesa:
-	 *	gen6_vs_push_constants
-	 *	gen7_gs_push_constants
-	 *	gen6_wm_push_constants
-	 * We do extra compared to mesa  (DS + HS) */
-	gen7_emit_push_constants(batch);
-
 	/* mesa: gen8_state_base_address */
 	gen8_emit_state_base_address(batch);
 
@@ -988,12 +997,28 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
 	 *	gen6_color_calc_state */
 	gen8_emit_cc(batch);
 
+	/* mesa:
+	 *	brw_vs_binding_table
+	 *	brw_gs_binding_table
+	 *	brw_wm_binding_table
+	 */
+
+	/* mesa: brw_fs_samplers (part 2) */
+	OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS);
+	OUT_BATCH(ps_sampler_state);
+
+	/* brw_vs_samplers */
+	/* brw_gs_samplers */
+
 	/* mesa: gen8_multisample_state */
 	gen8_emit_multisample(batch);
 
 	/* mesa: gen8_disable_stages */
 	gen8_emit_null_state(batch);
 
+	/* gen8_vs_state */
+	/* gen8_gs_state */
+
 	/* mesa: gen8_sol_state */
 	OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5-2));
 	OUT_BATCH(0);
@@ -1011,14 +1036,6 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
 	 */
 	gen8_emit_sf(batch);
 
-	/* mesa: brw_wm_binding_table */
-	OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS);
-	OUT_BATCH(ps_binding_table);
-
-	/* mesa: brw_fs_samplers (part 2) */
-	OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS);
-	OUT_BATCH(ps_sampler_state);
-
 	/* mesa: gen8_wm_state */
 	gen8_emit_ps(batch, ps_kernel_off);
 
@@ -1030,19 +1047,33 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
 	gen8_emit_depth(batch);
 	gen7_emit_clear(batch);
 
+	/* mesa: brw_polygon_stipple */
+	/* mesa: brw_polygon_stipple_offset */
+	/* mesa: brw_line_stipple */
+	/* mesa: brw_aa_line_parameters */
+
+	/* mesa: brw_wm_binding_table */
+	OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS);
+	OUT_BATCH(ps_binding_table);
+
 	/* mesa: brw_drawing_rect */
 	gen6_emit_drawing_rectangle(batch, dst);
 
-	/* mesa: gen8_vertices */
-	gen7_emit_vertex_buffer(batch, vertex_buffer);
-	gen6_emit_vertex_elements(batch);
-
 	/* mesa: gen8_vf_topology */
 	gen8_emit_vf_topology(batch);
 
+	/* mesa: brw_indices */
+	/* mesa: gen8_index_buffer */
+
 	/* mesa: gen8_vertices */
+	gen7_emit_vertex_buffer(batch, vertex_buffer);
+	gen6_emit_vertex_elements(batch);
 	gen8_emit_primitive(batch, vertex_buffer);
 
+	/* haswell_cut_index */
+	OUT_BATCH(HSW_3DSTATE_VF | (2 - 2));
+	OUT_BATCH(0);
+
 	OUT_BATCH(MI_BATCH_BUFFER_END);
 
 	batch_end = batch_align(batch, 8);