drm/i915: Make the update_mboxes() update both mboxes at the same time.

Futures callers will want to update both, too, so just put that logic
in the function.

1 files changed, 13 insertions, 16 deletions

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index c3f0c7b4441..0a1930ff3c8 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -432,16 +432,19 @@ static void render_ring_cleanup(struct intel_ring_buffer *ring)
 }
 
 static void
-update_mboxes(struct intel_ring_buffer *ring,
-	    u32 seqno,
-	    u32 mmio_offset)
+update_mboxes(struct intel_ring_buffer *ring, u32 seqno)
 {
-	intel_ring_emit(ring, MI_SEMAPHORE_MBOX |
-			      MI_SEMAPHORE_GLOBAL_GTT |
-			      MI_SEMAPHORE_REGISTER |
-			      MI_SEMAPHORE_UPDATE);
-	intel_ring_emit(ring, seqno);
-	intel_ring_emit(ring, mmio_offset);
+	int i;
+
+	for (i = 0; i < 2; i++) {
+		intel_ring_emit(ring,
+				MI_SEMAPHORE_MBOX |
+				MI_SEMAPHORE_GLOBAL_GTT |
+				MI_SEMAPHORE_REGISTER |
+				MI_SEMAPHORE_UPDATE);
+		intel_ring_emit(ring, seqno);
+		intel_ring_emit(ring, ring->signal_mbox[i]);
+	}
 }
 
 /**
@@ -457,21 +460,15 @@ static int
 gen6_add_request(struct intel_ring_buffer *ring,
 		 u32 *seqno)
 {
-	u32 mbox1_reg;
-	u32 mbox2_reg;
 	int ret;
 
 	ret = intel_ring_begin(ring, 10);
 	if (ret)
 		return ret;
 
-	mbox1_reg = ring->signal_mbox[0];
-	mbox2_reg = ring->signal_mbox[1];
-
 	*seqno = i915_gem_get_seqno(ring->dev);
 
-	update_mboxes(ring, *seqno, mbox1_reg);
-	update_mboxes(ring, *seqno, mbox2_reg);
+	update_mboxes(ring, *seqno);
 	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
 	intel_ring_emit(ring, *seqno);