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2012-03-07intel: Add .aub file output support.aubKenneth Graunke4-0/+453
This will allow the driver to capture all of its execution state to a file for later debugging. intel_gpu_dump is limited in that it only captures batchbuffers, and Mesa's captures, while more complete, still capture only a portion of the state involved in execution. It also enables us to load traces in our internal simulator. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2012-03-06intel: Add support for overriding the PCI ID via an environment variableKenneth Graunke2-9/+48
For example: export INTEL_DEVID_OVERRIDE=0x162 If this variable is set, don't actually submit the batchbuffer to the GPU, it probably contains commands for the wrong generation of hardware. v2: Introduce a getter for the overridden devid, and avoid getenv per exec. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2012-03-05Make drm/drm_fourcc.h portable to non-linux platformsAlan Coopersmith1-3/+3
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
2012-03-02Don't require pciaccess if Intel is disabledMatt Turner1-4/+6
Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Matt Turner <mattst88@gmail.com>
2012-02-22intel: Import a new batchbuffer for the gen7 test.Eric Anholt2-1081/+167
This one doesn't have the 3DSTATE_HIER_DEPTH_BUFFER bug that the previous one did. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-02-22intel: Add decode for gen7 HIER_DEPTH_BUFFER.Eric Anholt1-1/+13
Note that the regression test complains here: The batch that was captured included a bug in its packet output, which was later fixed in Mesa. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-02-22intel: Add decode for gen7 3DSTATE_WM.Eric Anholt2-98/+150
This requires pulling the gen6 3DSTATE_WM out to a function so it doesn't override gen7's handler. v2: Fix pasteo in interpreting ZW interpolation (thanks danvet!). Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-02-22intel: Fix a typo in decode error message.Eric Anholt1-1/+1
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-02-15intel: Detect cache domain inconsistency with valgrindChris Wilson1-0/+24
Every access to either the GTT or CPU pointer is supposed to be proceeded by a set_domain ioctl so that GEM is able to manage the cache domains correctly and for the following access to be coherent. Of course, some people explicitly want incoherent, non-blocking access which is going to trigger warnings by this patch but are probably better served by explicit suppression. v2: Also mark the pointers as inaccessible following the explicit unmap and implicit unmap upon return to the cache. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-02-13radeon: fix pitch alignment for scanout bufferJerome Glisse1-1/+13
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2012-02-13configure: Fix pkg-config test in absence of valgrindChris Wilson1-2/+4
The empty string used for the not case is replaced by the default if-else clause and so causes the configure to fail in the absence of valgrind. Which is not quite what was intended. Instead use the common idiom of setting a variable depending on whether the true or false branch is taken and emit the conditional code as a second step. Reported-by: Tobias Jakobi <liquid.acid@gmx.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-02-11intel: Mark up with valgrind intrinsics to reduce false positivesChris Wilson3-14/+43
In particular, declare the hidden CPU mmaps to valgrind so that it knows about those memory regions. v2: Add an additional VG_CLEAR for the getparam References: https://bugs.freedesktop.org/show_bug.cgi?id=35071 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Ben Widawsky <ben@bwidawsk.net> [anholt: Ideally valgrind should just learn about the ioctls, and removing the clear for the non-valgrindified code feels risky.] Reviewed-by: Eric Anholt <eric@anholt.net>
2012-02-08radeon_cs_setup_bo: Fix accounting if caller specified write and read domains.Michel Dänzer1-6/+9
Only account for the write domain in that case. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=43893 . Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-02-06configure: Bump version for 2.4.31Jerome Glisse1-1/+1
2012-02-06radeon: add r600_pci_ids.h to header fileJerome Glisse1-1/+2
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2012-02-03radeon: fix surface API for good before anyone start relying on itJerome Glisse2-20/+11
The mipmap level computation was wrong, we need to know the block width, height, depth of compressed texture to properly compute this. Change API to provide block width, height, depth instead of nblk_x, nblk_y, nblk_z. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2012-02-02radeon: surface fix macro -> micro tile fallbackJerome Glisse1-58/+67
We need to force 1D tiling only on old kernel the fallback was broken along the way. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2012-02-02Using sizeof() on a function parameter with an array type does notVille Syrjälä1-3/+3
work. sizeof() treats such parameters as pointers. Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
2012-02-02This function was missing.Ville Syrjälä2-0/+10
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
2012-02-02drmModeFreeResources() always leaked some memory.Ville Syrjälä1-0/+6
drmModeGetPlaneResources() and drmModeGetPlane() leaked in one error path. Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
2012-02-01radeon: add surface allocator helper v10Jerome Glisse5-7/+1399
The surface allocator is able to build complete miptree when allocating surface for r600/r700/evergreen/northern islands GPU family. It also compute bo size and alignment for render buffer, depth buffer and scanout buffer. v2 fix r6xx/r7xx 2D tiling width align computation v3 add tile split support and fix 1d texture alignment v4 rework to more properly support compressed format, split surface pixel size and surface element size in separate fields v5 support texture array (still issue on r6xx) v6 split surface value computation and mipmap tree building, rework eg and newer computation v7 add a check for tile split and 2d tiled v8 initialize mode value before testing it in all case, reenable 2D macro tile mode on r6xx for cubemap and array. Fix cubemap to force array size to the number of face. v9 fix handling of stencil buffer on evergreen v10 on evergreen depth buffer need to have enough room for a stencil buffer just after depth one Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2012-02-01intel: query for LLC supportEugeni Dodonov2-0/+13
This adds support for querying the kernel about the LLC support in the hardware. In case the ioctl fails, we assume that it is present on GEN6 and GEN7. v2: fix the return code checking Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
2012-01-31intel: Fix build of Intel DRM on x86 systemsPaul Berry1-2/+2
Commit efd6e81e inadvertently broke the build by looking for "i?86" or "x86_64" in $host_os. The correct variable to check is $host_cpu. This was preventing libdrm_intel.so from being built. Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-01-30Don't build Intel DRM if $CHOST is not i?86-* or x86_64-*Jeremy Huddleston1-1/+4
This fixes a failure in 'make check' found by the tinderbox when trying to build this code on Linux/ppc. This code is only designed to run on Intel platforms, so don't even bother building it if we're not in that set. Found-by: Tinderbox Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
2012-01-30intel: Fix bufmgr_gem->gen for gen > 4Chad Versace1-1/+7
If the pci_device's actual gen was > 4, then we stupidly set bufmgr_gem->gen = 6. Luckily this caused no bugs, and this fix shouldn't change any behavior, because all checks against the gen currently have one of the forms below: gen == 2 gen == 3 gen >= 4 Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
2012-01-27intel: Add minimal decode for remaining gen7 packets in use.Eric Anholt2-772/+656
This just gets packet name and length in place, with the remainder unfinished. I've long since finished the work that got me started fixing up the decode.
2012-01-27intel: Add decode for gen7 constant buffer packets.Eric Anholt2-209/+241
2012-01-27intel: Add decode for gen7 state pointers.Eric Anholt2-27/+83
Since CC_STATE_POINTERS for gen6 and 7 are quite different but use the same opcode, move gen6 out to a helper function too, so we can use a helper function for gen7.
2012-01-27intel: Add support for parsing gen7 URB packets.Eric Anholt2-56/+100
2012-01-27intel: Make most of the logic for 965 3d packet length checks table-driven.Eric Anholt2-110/+73
This puts the error message in a consistent location relative to the packet, and while I'm here I made the error message a bit more informative. Now, most static length packets need to just declare their length in the table and not worry.
2012-01-27intel: Move the logic for getting 965 3d packet length to the packet table.Eric Anholt1-83/+73
While I'm touching every line of the table, sort it by opcode.
2012-01-27intel: Add support for parsing 965 3d packets using helper functions.Eric Anholt1-1/+7
I want to add packets, without contributing to the switch statement of doom.
2012-01-27intel: Parse the correct length for gen7 3DSTATE_MULTISAMPLE.Eric Anholt2-2/+2
2012-01-27intel: Put the "gen" shorthand chipset identifier in the context.Eric Anholt1-0/+28
It's a lot nicer than using IS_WHATEVER(devid) all over the place, and we have this in our other projects too.
2012-01-27intel: Avoid the need for most overflow checks by using a scratch page.Eric Anholt1-141/+24
The overflow checks were all thoroughly untested, and a bunch of the ones I'm deleting were pretty broken. Now, in the case of overflow, you just decode data of 0xd0d0d0d0, and instr_out prints the warning message instead. Note that this still has the same issue of being under-tested, but at least it's one place instead of per-packet. A couple of BUFFER_FAIL uses are left where the length to be decoded could be (significantly) larger than a page, and the decode didn't just call instr_out (which doesn't dereference data itself unless it's safe).
2012-01-27intel: Make instr_out take the decode context.Eric Anholt1-390/+377
This reduces some of the extra derefs of the pointers.
2012-01-27intel: Use the context to simplify BR01 decode.Eric Anholt1-12/+14
Similar to BR00, count was always 1 and was always an index, not a count.
2012-01-27intel: Use the context to simplify BR00 decode.Eric Anholt1-12/+11
The count (actually index) was always 0, because BR00 is dword 0.
2012-01-27intel: Plumb the context through the decode callchain.Eric Anholt1-26/+44
We still deref the context at the start of every call, but that will change next.
2012-01-27intel: Drop the code for counting parsing failures.Eric Anholt1-50/+24
Nothing was consuming it. If something wants this in the future, would be done using the decode context anyway.
2012-01-27intel: Track the current packet location in the decode context.Eric Anholt2-35/+52
This is the start of plumbing the context through the decode callchain instead of the current 4 arguments.
2012-01-27intel: Add a regression test for 2D decode, which I'm about to refactor.Eric Anholt4-0/+16
2012-01-09intel: add sprite ioctl defines and struct for i915 sprite codeJesse Barnes1-0/+36
2012-01-06configure: Bump version for 2.4.30Eric Anholt1-1/+1
2012-01-04intel: Update for new i915_drm.h defines.Eric Anholt1-1/+5
2012-01-04intel: Add regression tests for batch decode.Eric Anholt19-0/+3872
The .batch was generated using the dump-a-batch branch of git://people.freedesktop.org/~anholt/mesa using glxgears on gen7 hardware, using INTEL_DEVID_OVERRIDE for non-gen7 (this means that offsets in the buffers for non-gen7 are 0!). The .ref was generated by: ./test_decode tests/gen7-3d.batch -dump. The .sh exists because you can't supply arguments to tests using the simple automake tests driver. Something reasonable could be done using automake's parallel-tests driver (in fact, a previous version of the patch did that), but I was concerned that: 1) The parallel-tests driver is documented to be unstable -- they may change interfaces on us later. 2) The parallel-tests driver hides the output of tests in .log files scattered all over the tree, which was ugly and more painful to work with. v2: Actually add the batch files, add a .gitignore for the *-new.txt files added after failures, and fix failure mode for undetected chipset name. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v1)
2012-01-04intel: Add a regression test program for intel_decode.c.Eric Anholt4-0/+198
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-01-04intel: Add an interface for setting the output file for decode.Eric Anholt2-2/+14
Consumers often want to choose stdout vs stderr, and for testing I want to output to an open_memstream file. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-12-30intel/intel_decode.c: Remove #include "intel_decode.h".Johannes Obermayr1-1/+0
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
2011-12-29intel: Disable unused decode_logic_op().Eric Anholt1-0/+2
It was producing an unused code warning. I'm tempted to just remove it, since it's unused, but I *might* use it soon. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
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