Clean ups

- Xv
- savage_regs.c
- setGBD code

4 files changed, 148 insertions, 301 deletions

diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c
index 404b48f67..820440175 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c
@@ -440,8 +440,6 @@ SavageSetGBD(ScrnInfoPtr pScrn)
             SavageSetGBD_M7(pScrn);            
             break;
         case S3_SAVAGE4:
-            SavageSetGBD_Savage4(pScrn);
-            break;
         case S3_TWISTER:
         case S3_PROSAVAGE:            
         case S3_PROSAVAGEDDR:
@@ -456,54 +454,22 @@ SavageSetGBD(ScrnInfoPtr pScrn)
     }
 }
 
-#if 0
-void
-SavageSetGBD( ScrnInfoPtr pScrn )
-{
-    vgaHWPtr hwp = VGAHWPTR(pScrn);
-    SavagePtr psav = SAVPTR(pScrn);
-    unsigned int vgaCRIndex = hwp->IOBase + 4;
-    unsigned int vgaCRReg = hwp->IOBase + 5;
-    unsigned long GlobalBitmapDescriptor;
-
-    GlobalBitmapDescriptor = 1 | 8 | BCI_BD_BW_DISABLE;
-    BCI_BD_SET_BPP(GlobalBitmapDescriptor, pScrn->bitsPerPixel);
-    BCI_BD_SET_STRIDE(GlobalBitmapDescriptor, pScrn->displayWidth);
-
-    /* Turn on 16-bit register access. */
-
-    VGAOUT8(vgaCRIndex, 0x31);
-    VGAOUT8(vgaCRReg, 0x0c);
-
-    /* Set stride to use GBD. */
-
-    VGAOUT8(vgaCRIndex, 0x50);
-    VGAOUT8(vgaCRReg, VGAIN8(vgaCRReg) | 0xC1);
-
-    /* Enable 2D engine. */
-
-    VGAOUT16(vgaCRIndex, 0x0140);
-
-    /* Now set the GBD and SBDs. */
-
-    OUTREG(0x8168, 0);
-    OUTREG(0x816C, GlobalBitmapDescriptor);
-    OUTREG(0x8170, 0);
-    OUTREG(0x8174, GlobalBitmapDescriptor);
-    OUTREG(0x8178, 0);
-    OUTREG(0x817C, GlobalBitmapDescriptor);
-
-    OUTREG(PRI_STREAM_STRIDE, pScrn->displayWidth * pScrn->bitsPerPixel >> 3);
-    OUTREG(SEC_STREAM_STRIDE, pScrn->displayWidth * pScrn->bitsPerPixel >> 3);
-}
-#endif
-
 void SavageSetGBD_Twister(ScrnInfoPtr pScrn)
 {
     SavagePtr psav = SAVPTR(pScrn);
     ulong       ulTmp;
     uchar byte;
-    
+    int bci_enable, tile16, tile32;
+
+    if (psav->Chipset == S3_SAVAGE4) {
+	bci_enable = BCI_ENABLE;
+	tile16 = TILE_FORMAT_DESTINATION16;
+	tile32 = TILE_FORMAT_DESTINATION32;
+    } else {
+	bci_enable = BCI_ENABLE_TWISTER;
+	tile16 = TILE_DESTINATION;
+	tile32 = TILE_DESTINATION;
+    }
     
     /* MM81C0 and 81C4 are used to control primary stream. */
     OUTREG32(PRI_STREAM_FBUF_ADDR0,0x00000000);
@@ -540,29 +506,28 @@ void SavageSetGBD_Twister(ScrnInfoPtr pScrn)
      *  CR69, bit 7 = 1
      *  to use MM streams processor registers to control primary stream.
      */
-    OUTREG8(CRT_ADDRESS_REG,0X69);
-    byte = INREG8(CRT_DATA_REG) | 0X80;
+    OUTREG8(CRT_ADDRESS_REG,0x69);
+    byte = INREG8(CRT_DATA_REG) | 0x80;
     OUTREG8(CRT_DATA_REG,byte);
 
     OUTREG32(0x8128, 0xFFFFFFFFL);
     OUTREG32(0x812C, 0xFFFFFFFFL);
 
-    OUTREG32(0x816C,BCI_ENABLE | S3_LITTLE_ENDIAN | S3_BD64);
+    OUTREG32(S3_BCI_GLB_BD_HIGH, bci_enable | S3_LITTLE_ENDIAN | S3_BD64);
 
-    if (psav->bTiled) {
-        /* CR50, bit 7,6,0 = 111, Use GBD.*/
-        OUTREG8(CRT_ADDRESS_REG,0X50);
-        byte = INREG8(CRT_DATA_REG) | 0XC1;
-        OUTREG8(CRT_DATA_REG, byte);
-    }
+
+    /* CR50, bit 7,6,0 = 111, Use GBD.*/
+    OUTREG8(CRT_ADDRESS_REG,0x50);
+    byte = INREG8(CRT_DATA_REG) | 0xC1;
+    OUTREG8(CRT_DATA_REG, byte);
 
     /*
      * if MS1NB style linear tiling mode.
      * bit MM850C[15] = 0 select NB linear tile mode.
      * bit MM850C[15] = 1 select MS-1 128-bit non-linear tile mode.
      */
-    ulTmp = INREG32(0X850C) | 0x8000; /* use MS-s style tile mode*/
-    OUTREG32(0X850C,ulTmp);
+    ulTmp = INREG32(ADVANCED_FUNC_CTRL) | 0x8000; /* use MS-s style tile mode*/
+    OUTREG32(ADVANCED_FUNC_CTRL,ulTmp);
 
     /*
      * Set up Tiled Surface Registers
@@ -574,7 +539,7 @@ void SavageSetGBD_Twister(ScrnInfoPtr pScrn)
      *            = 11, 32 bpp.
      */
     /*
-     * Global Bitmap Descriptor Register MM816C
+     * Global Bitmap Descriptor Register MM816C - twister/prosavage
      *   bit 24~25: tile format
      *          00: linear 
      *          01: destination tiling format
@@ -584,147 +549,14 @@ void SavageSetGBD_Twister(ScrnInfoPtr pScrn)
      *          0: disable
      *          1: enable
      */
-    if (!psav->bTiled) {
-        /*
-         *  Do not enable block_write even for non-tiling modes, because
-         *  the driver cannot determine if the memory type is the certain
-         *  type of SGRAM for which block_write can be used.
-         */
-        psav->GlobalBD.bd1.HighPart.ResBWTile = 0;/* linear */
-    }
-    else if (pScrn->bitsPerPixel == 16) {
-        psav->GlobalBD.bd1.HighPart.ResBWTile = 1;/* destination tiling format */
-        
-        ulTmp = (((pScrn->virtualX + 0x3F) & 0x0000FFC0) >> 6) << 20;
-        OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP16);
-    }
-    else if (pScrn->bitsPerPixel == 32) {
-
-        psav->GlobalBD.bd1.HighPart.ResBWTile = 1;/* destination tiling format */
-        
-        ulTmp = ( ((pScrn->virtualX + 0x1F) & 0x0000FFE0) >> 5) << 20;
-        OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp|TILED_SURF_BPP32);
-    }
-
-    psav->GlobalBD.bd1.HighPart.ResBWTile |= 0;/* disable block write */
-    /* HW uses width */
-    psav->GlobalBD.bd1.HighPart.Stride = (ushort) psav->lDelta / (pScrn->bitsPerPixel >> 3);
-    psav->GlobalBD.bd1.HighPart.Bpp = (uchar) (pScrn->bitsPerPixel);
-    psav->GlobalBD.bd1.Offset = 0;
-    
-
     /*
-     * CR88, bit 4 - Block write enabled/disabled.
-     *
-     *      Note: Block write must be disabled when writing to tiled
-     *            memory.  Even when writing to non-tiled memory, block
-     *            write should only be enabled for certain types of SGRAM.
-     */
-    OUTREG8(CRT_ADDRESS_REG,0X88);
-    byte = INREG8(CRT_DATA_REG) | DISABLE_BLOCK_WRITE_2D;
-    OUTREG8(CRT_DATA_REG,byte);
-
-    /*
-     * CR31, bit 0 = 0, Disable address offset bits(CR6A_6-0).
-     *       bit 0 = 1, Enable 8 Mbytes of display memory thru 64K window
-     *                  at A000:0.
-     */
-    OUTREG8(CRT_ADDRESS_REG,0X31);
-    byte = INREG8(CRT_DATA_REG) & (~(ENABLE_CPUA_BASE_A0000));
-    OUTREG8(CRT_DATA_REG,byte);
-
-    /* turn on screen */
-    OUTREG8(SEQ_ADDRESS_REG,0x01);
-    byte = INREG8(SEQ_DATA_REG) & ~0X20;
-    OUTREG8(SEQ_DATA_REG,byte);
-    
-    /* program the GBD */
-    OUTREG32(S3_GLB_BD_LOW,psav->GlobalBD.bd2.LoPart);
-    OUTREG32(S3_GLB_BD_HIGH,psav->GlobalBD.bd2.HiPart | BCI_ENABLE | S3_LITTLE_ENDIAN | S3_BD64);
-}
-
-void SavageSetGBD_Savage4(ScrnInfoPtr pScrn)
-{
-    SavagePtr psav = SAVPTR(pScrn);
-    ulong       ulTmp;
-    uchar byte;
-
- 
-    /* MM81C0 and 81C4 are used to control primary stream. */
-    OUTREG32(PRI_STREAM_FBUF_ADDR0,0x00000000);
-    OUTREG32(PRI_STREAM_FBUF_ADDR1,0x00000000);
-    
-    /*
-     *  Program Primary Stream Stride Register.
-     *
-     *  Tell engine if tiling on or off, set primary stream stride, and
-     *  if tiling, set tiling bits/pixel and primary stream tile offset.
-     *  Note that tile offset (bits 16 - 29) must be scanline width in
-     *  bytes/128bytespertile * 256 Qwords/tile.  This is equivalent to
-     *  lDelta * 2.  Remember that if tiling, lDelta is screenwidth in
-     *  bytes padded up to an even number of tilewidths.
-     */
-    if (!psav->bTiled) {
-        OUTREG32(PRI_STREAM_STRIDE,
-                 (((psav->lDelta * 2) << 16) & 0x3FFFE000) |
-                 (psav->lDelta & 0x00001fff));
-    }
-    else if (pScrn->bitsPerPixel == 16) {
-        /* Scanline-length-in-bytes/128-bytes-per-tile * 256 Qwords/tile */
-        OUTREG32(PRI_STREAM_STRIDE,
-                 (((psav->lDelta * 2) << 16) & 0x3FFFE000)
-                 | 0x80000000 | (psav->lDelta & 0x00001fff));
-    }
-    else if (pScrn->bitsPerPixel == 32) {
-        OUTREG32(PRI_STREAM_STRIDE,
-                 (((psav->lDelta * 2) << 16) & 0x3FFFE000)
-                 | 0xC0000000 | (psav->lDelta & 0x00001fff));
-    }
-
-    /*
-     *  CR69, bit 7 = 1
-     *  to use MM streams processor registers to control primary stream.
-     */
-    OUTREG8(CRT_ADDRESS_REG,0X69);
-    byte = INREG8(CRT_DATA_REG) | 0X80;
-    OUTREG8(CRT_DATA_REG,byte);
-
-    OUTREG32(0x8128, 0xFFFFFFFFL);
-    OUTREG32(0x812C, 0xFFFFFFFFL);
-    OUTREG32(0x816C, 8 | S3_LITTLE_ENDIAN | S3_BD64);
-
-
-    /* CR50, bit 7,6,0 = 111, Use GBD.*/
-    OUTREG8(CRT_ADDRESS_REG,0X50);
-    byte = INREG8(CRT_DATA_REG) | 0XC1;
-    OUTREG8(CRT_DATA_REG, byte);
-
-
-    /*
-     * if MS1NB style linear tiling mode.
-     * bit MM850C[15] = 0 select NB linear tile mode.
-     * bit MM850C[15] = 1 select MS-1 128-bit non-linear tile mode.
-     */
-    ulTmp = INREG32(0X850C) | 0x8000; /* use MS-s style tile mode*/
-    OUTREG32(0X850C,ulTmp);
-
-    /*
-     * Set up Tiled Surface Registers
-     *  Bit 25:20 - Surface width in tiles.
-     *  Bit 29 - Y Range Flag.
-     *  Bit 31:30 = 00, 4 bpp.
-     *            = 01, 8 bpp.
-     *            = 10, 16 bpp.
-     *            = 11, 32 bpp.
-     */
-    /*
-     * Global Bitmap Descriptor Register MM816C
+     * Global Bitmap Descriptor Register MM816C - savage4
      *   bit 24~25: tile format
      *          00: linear 
      *          01: reserved
      *          10: 16 bpp tiles
      *          11: 32 bpp tiles
-     *   bit 28: block write disable/enable
+     *   bit 29: block write disable/enable
      *          0: enable
      *          1: disable
      */
@@ -734,22 +566,22 @@ void SavageSetGBD_Savage4(ScrnInfoPtr pScrn)
          *  the driver cannot determine if the memory type is the certain
          *  type of SGRAM for which block_write can be used.
          */
-        psav->GlobalBD.bd1.HighPart.ResBWTile = 0;/* linear */
+        psav->GlobalBD.bd1.HighPart.ResBWTile = TILE_FORMAT_LINEAR;/* linear */
     }
     else if (pScrn->bitsPerPixel == 16) {
-        psav->GlobalBD.bd1.HighPart.ResBWTile = 2;/* 16 bpp tiling format */
+	psav->GlobalBD.bd1.HighPart.ResBWTile = tile16; /* 16 bpp/destination tiling format */
         
         ulTmp = (((pScrn->virtualX + 0x3F) & 0x0000FFC0) >> 6) << 20;
         OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP16);
     }
     else if (pScrn->bitsPerPixel == 32) {
-        psav->GlobalBD.bd1.HighPart.ResBWTile = 3;/* 32 bpp tiling format */
+        psav->GlobalBD.bd1.HighPart.ResBWTile = tile32; /* 32 bpp/destination tiling format */
         
         ulTmp = ( ((pScrn->virtualX + 0x1F) & 0x0000FFE0) >> 5) << 20;
         OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP32);
     }
 
-    psav->GlobalBD.bd1.HighPart.ResBWTile |= 0x10;/* disable block write */
+    psav->GlobalBD.bd1.HighPart.ResBWTile |= 0x10;/* disable block write - was 0 */
     /* HW uses width */
     psav->GlobalBD.bd1.HighPart.Stride = (ushort) psav->lDelta / (pScrn->bitsPerPixel >> 3);
     psav->GlobalBD.bd1.HighPart.Bpp = (uchar) (pScrn->bitsPerPixel);
@@ -763,7 +595,7 @@ void SavageSetGBD_Savage4(ScrnInfoPtr pScrn)
      *            memory.  Even when writing to non-tiled memory, block
      *            write should only be enabled for certain types of SGRAM.
      */
-    OUTREG8(CRT_ADDRESS_REG,0X88);
+    OUTREG8(CRT_ADDRESS_REG,0x88);
     byte = INREG8(CRT_DATA_REG) | DISABLE_BLOCK_WRITE_2D;
     OUTREG8(CRT_DATA_REG,byte);
 
@@ -772,26 +604,18 @@ void SavageSetGBD_Savage4(ScrnInfoPtr pScrn)
      *       bit 0 = 1, Enable 8 Mbytes of display memory thru 64K window
      *                  at A000:0.
      */
-    OUTREG8(CRT_ADDRESS_REG,0X31);
+    OUTREG8(CRT_ADDRESS_REG,MEMORY_CONFIG_REG); /* cr31 */
     byte = INREG8(CRT_DATA_REG) & (~(ENABLE_CPUA_BASE_A0000));
-    OUTREG8(CRT_DATA_REG,byte);
+    OUTREG8(CRT_DATA_REG,byte); /* perhaps this should be 0x0c */
 
     /* turn on screen */
     OUTREG8(SEQ_ADDRESS_REG,0x01);
-    byte = INREG8(SEQ_DATA_REG) & ~0X20;
+    byte = INREG8(SEQ_DATA_REG) & ~0x20;
     OUTREG8(SEQ_DATA_REG,byte);
     
     /* program the GBD */
     OUTREG32(S3_GLB_BD_LOW,psav->GlobalBD.bd2.LoPart);
-    OUTREG32(S3_GLB_BD_HIGH,psav->GlobalBD.bd2.HiPart | 8 | S3_LITTLE_ENDIAN | S3_BD64);
-
- /* AGD: DRI seems to use PBD for front/back/depth buffers, 
-    but writing to them here doesn't seem to hurt anything so... */
-    OUTREG32(S3_PRI_BD_LOW,psav->GlobalBD.bd2.LoPart);
-    OUTREG32(S3_PRI_BD_HIGH,psav->GlobalBD.bd2.HiPart);
-    OUTREG32(S3_SEC_BD_LOW,psav->GlobalBD.bd2.LoPart);
-    OUTREG32(S3_SEC_BD_HIGH,psav->GlobalBD.bd2.HiPart);
-
+    OUTREG32(S3_GLB_BD_HIGH,psav->GlobalBD.bd2.HiPart | bci_enable | S3_LITTLE_ENDIAN | S3_BD64);
 }
 
 void SavageSetGBD_M7(ScrnInfoPtr pScrn)
@@ -799,6 +623,12 @@ void SavageSetGBD_M7(ScrnInfoPtr pScrn)
     SavagePtr psav = SAVPTR(pScrn);
     ulong ulTmp;
     uchar byte;
+    int bci_enable, tile16, tile32;
+
+    bci_enable = BCI_ENABLE;
+    tile16 = TILE_FORMAT_DESTINATION16;
+    tile32 = TILE_FORMAT_DESTINATION32;
+
 
     /* following is the enable case */
 
@@ -886,11 +716,11 @@ void SavageSetGBD_M7(ScrnInfoPtr pScrn)
     OUTREG32(0x8128, 0xFFFFFFFFL);
     OUTREG32(0x812C, 0xFFFFFFFFL);
 
-    OUTREG32(0x816C, ENABLE_BCI | S3_LITTLE_ENDIAN | S3_BD64);
+    OUTREG32(S3_BCI_GLB_BD_HIGH, bci_enable | S3_LITTLE_ENDIAN | S3_BD64);
     
     /* CR50, bit 7,6,0 = 111, Use GBD.*/
-    OUTREG8(CRT_ADDRESS_REG,0X50);
-    byte = INREG8(CRT_DATA_REG) | 0XC1;
+    OUTREG8(CRT_ADDRESS_REG,0x50);
+    byte = INREG8(CRT_DATA_REG) | 0xC1;
     OUTREG8(CRT_DATA_REG, byte);
 
     /*
@@ -900,7 +730,7 @@ void SavageSetGBD_M7(ScrnInfoPtr pScrn)
      *            memory.  Even when writing to non-tiled memory, block
      *            write should only be enabled for certain types of SGRAM.
      */
-    OUTREG8(CRT_ADDRESS_REG,0X78);
+    OUTREG8(CRT_ADDRESS_REG,0x78);
     /*byte = INREG8(CRT_DATA_REG) & ~0x0C;*/
     byte = INREG8(CRT_DATA_REG) | 0xfb;
     OUTREG8(CRT_DATA_REG,byte);
@@ -932,17 +762,17 @@ void SavageSetGBD_M7(ScrnInfoPtr pScrn)
          *  the driver cannot determine if the memory type is the certain
          *  type of SGRAM for which block_write can be used.
          */
-        psav->GlobalBD.bd1.HighPart.ResBWTile = 0;/* linear */
+        psav->GlobalBD.bd1.HighPart.ResBWTile = TILE_FORMAT_LINEAR;/* linear */
 
     }
     else if (pScrn->bitsPerPixel == 16) {
-        psav->GlobalBD.bd1.HighPart.ResBWTile = 2;/* 16 bit */
+        psav->GlobalBD.bd1.HighPart.ResBWTile = tile16;/* 16 bit */
 
             ulTmp =  ((psav->lDelta / 2) >> 6) << 24;
         OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP16);
     }
     else if (pScrn->bitsPerPixel == 32) {
-        psav->GlobalBD.bd1.HighPart.ResBWTile = 3;/* 32 bit */
+        psav->GlobalBD.bd1.HighPart.ResBWTile = tile32;/* 32 bit */
      
             ulTmp =  ((psav->lDelta / 4) >> 5) << 24;        
         OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP32);
@@ -960,7 +790,7 @@ void SavageSetGBD_M7(ScrnInfoPtr pScrn)
      *       bit 0 = 1, Enable 8 Mbytes of display memory thru 64K window
      *                  at A000:0.
      */
-    OUTREG8(CRT_ADDRESS_REG,MEMORY_CONFIG_REG);
+    OUTREG8(CRT_ADDRESS_REG,MEMORY_CONFIG_REG); /* cr31 */
     byte = INREG8(CRT_DATA_REG) & (~(ENABLE_CPUA_BASE_A0000));
     OUTREG8(CRT_DATA_REG,byte);
 
@@ -968,27 +798,35 @@ void SavageSetGBD_M7(ScrnInfoPtr pScrn)
     OUTREG32(S3_GLB_BD_LOW,psav->GlobalBD.bd2.LoPart );
     /* 8: bci enable */
     OUTREG32(S3_GLB_BD_HIGH,(psav->GlobalBD.bd2.HiPart
-                             | 8 | S3_LITTLE_ENDIAN | S3_BD64));
+                             | bci_enable | S3_LITTLE_ENDIAN | S3_BD64));
 
- /* AGD: DRI seems to use PBD for front/back/depth buffers, 
-    but writing to them here doesn't seem to hurt anything so... */
+#if 0
     OUTREG32(S3_PRI_BD_LOW,psav->GlobalBD.bd2.LoPart);
     OUTREG32(S3_PRI_BD_HIGH,psav->GlobalBD.bd2.HiPart);
     OUTREG32(S3_SEC_BD_LOW,psav->GlobalBD.bd2.LoPart);
     OUTREG32(S3_SEC_BD_HIGH,psav->GlobalBD.bd2.HiPart);
-
+#endif
 
     /* turn on screen */
     OUTREG8(SEQ_ADDRESS_REG,0x01);
     byte = INREG8(SEQ_DATA_REG) & ~0X20;
     OUTREG8(SEQ_DATA_REG,byte);
 }
-                        
+                       
 void SavageSetGBD_PM(ScrnInfoPtr pScrn)
 {
     SavagePtr psav = SAVPTR(pScrn);
     ulong ulTmp;
     uchar byte;
+    int bci_enable, tile16, tile32;
+    
+    /* Is supersavage like savage4 or twister?
+     * change the bci_enable and tile bits here.
+     */
+    bci_enable = BCI_ENABLE_TWISTER;
+    tile16 = TILE_DESTINATION;
+    tile32 = TILE_DESTINATION;
+
 
     /* following is the enable case */
              
@@ -1070,11 +908,11 @@ void SavageSetGBD_PM(ScrnInfoPtr pScrn)
     OUTREG32(0x812C, 0xFFFFFFFFL);
     
     /* bit 28:block write disable */
-    OUTREG32(S3_GLB_BD_HIGH,BCI_ENABLE | S3_BD64 | 0x10000000);
+    OUTREG32(S3_GLB_BD_HIGH, bci_enable | S3_BD64 | 0x10000000); 
     
     /* CR50, bit 7,6,0 = 111, Use GBD.*/
-    OUTREG8(CRT_ADDRESS_REG,0X50);
-    byte = INREG8(CRT_DATA_REG) | 0XC1;
+    OUTREG8(CRT_ADDRESS_REG,0x50);
+    byte = INREG8(CRT_DATA_REG) | 0xC1;
     OUTREG8(CRT_DATA_REG, byte);
 
     if (!psav->bTiled) {
@@ -1083,17 +921,17 @@ void SavageSetGBD_PM(ScrnInfoPtr pScrn)
          *  the driver cannot determine if the memory type is the certain
          *  type of SGRAM for which block_write can be used.
          */
-        psav->GlobalBD.bd1.HighPart.ResBWTile = 0;/* linear */
+        psav->GlobalBD.bd1.HighPart.ResBWTile = TILE_FORMAT_LINEAR;/* linear */
         
     }
     else if (pScrn->bitsPerPixel == 16) {
-        psav->GlobalBD.bd1.HighPart.ResBWTile = 1;/* tile format destination */
+        psav->GlobalBD.bd1.HighPart.ResBWTile = tile16;/* tile format destination */
         
         ulTmp =  (((pScrn->virtualX + 0x3f) & 0x0000ffc0) >> 6) << 20;
         OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP16);
     }
     else if (pScrn->bitsPerPixel == 32) {
-        psav->GlobalBD.bd1.HighPart.ResBWTile = 1;/* tile format destination */
+        psav->GlobalBD.bd1.HighPart.ResBWTile = tile32;/* tile format destination */
         
         ulTmp =  (((pScrn->virtualX + 0x1f) & 0x0000ffe0) >> 5) << 20;        
         OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP32);
@@ -1117,12 +955,12 @@ void SavageSetGBD_PM(ScrnInfoPtr pScrn)
     /* program the GBD */
     OUTREG32(S3_GLB_BD_LOW,psav->GlobalBD.bd2.LoPart );
     OUTREG32(S3_GLB_BD_HIGH,(psav->GlobalBD.bd2.HiPart 
-			     | BCI_ENABLE /* AGD: shouldn't BCI be enabled? */
+			     | bci_enable /* AGD: shouldn't BCI be enabled? */
                              | S3_LITTLE_ENDIAN | 0x10000000 | S3_BD64));
     
     /* turn on screen */
     OUTREG8(SEQ_ADDRESS_REG,0x01);
-    byte = INREG8(SEQ_DATA_REG) & ~0X20;
+    byte = INREG8(SEQ_DATA_REG) & ~0x20;
     OUTREG8(SEQ_DATA_REG,byte);
 }
 
@@ -1135,8 +973,7 @@ void SavageSetGBD_2000(ScrnInfoPtr pScrn)
     unsigned long GlobalBitmapDescriptor;
 
 
-/* AGD: no idea how to program savage2000 GBD...I suspect it's probably like supersavage 
-   (Since they both seem to use the same streams engine), for now default to Tim's method */
+/* AGD: no idea how to program savage2000 GBD... for now default to Tim's method */
 
     GlobalBitmapDescriptor = 1 | 8 | BCI_BD_BW_DISABLE;
     BCI_BD_SET_BPP(GlobalBitmapDescriptor, pScrn->bitsPerPixel);
@@ -1561,7 +1398,7 @@ SavageInitAccel(ScreenPtr pScreen)
              * because the alignment requirement,the on-screen need more memory
              * than (0,0,virtualX,virtualY), but xf86InitFBManager only subtract
              * (pScrn->virtualX * pScrn->virtualY from (0,0,cxMemory,cyMemory),so
-             * here,we should reserver some memory for on-screen
+             * here,we should reserve some memory for on-screen
              */
             tmp = ((psav->cxMemory * pScrn->virtualY - pScrn->virtualX * pScrn->virtualY)
                    + psav->cxMemory -1) / (psav->cxMemory);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_bci.h b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_bci.h
index 15ccb37c3..2e58de220 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_bci.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_bci.h
@@ -15,28 +15,20 @@
  */
 
 
-#if 0 /* savage4 */
-    #define   TILE_LINEAR                   0
-    #define   TILE_FORMAT_LINEAR            0
-    #define   TILE_TEXTURE                  2
-    #define   TILE_DESTINATION              1
-    #define   TILE_FORMAT_DESTINATION16     2
-    #define   TILE_FORMAT_DESTINATION32     3
-#endif
-    #define   TILE_LINEAR                   0
-    #define   TILE_FORMAT_LINEAR            0
-    #define   TILE_TEXTURE                  2
-    #define   TILE_DESTINATION              1
-    #define   TILE_FORMAT_DESTINATION       1
-    #define   TILE_FORMAT_DESTINATION16     1
-    #define   TILE_FORMAT_DESTINATION32     1
-
-
-#if 0 /* savage4 */
-    #define   BCI_ENABLE                    8
-#endif
-    #define   BCI_ENABLE                    0
 
+#define   TILE_LINEAR                   0
+#define   TILE_FORMAT_LINEAR            0
+#define   TILE_TEXTURE                  2
+#define   TILE_DESTINATION              1
+#define   TILE_FORMAT_DESTINATION16     2
+#define   TILE_FORMAT_DESTINATION32     3
+
+/* BD - BCI enable */
+/* savage4, MX, IX, 3D */
+#define   BCI_ENABLE                    8
+/* twister, prosavage */
+/* not sure which one supersavage fits into */
+#define   BCI_ENABLE_TWISTER            0
 
 #define   S3_BIG_ENDIAN                    4
 #define   S3_LITTLE_ENDIAN                 0
@@ -116,7 +108,7 @@
 #define BCI_BD_TILE_MASK             0x03000000
 #define BCI_BD_TILE_NONE             0x00000000
 #define BCI_BD_TILE_16               0x02000000
-#define BCI_BD_TILE_32               0x03000000 /*0x04000000*/
+#define BCI_BD_TILE_32               0x03000000
 #define BCI_BD_GET_BPP(bd)           (((bd) >> 16) & 0xFF)
 #define BCI_BD_SET_BPP(bd, bpp)      ((bd) |= (((bpp) & 0xFF) << 16))
 #define BCI_BD_GET_STRIDE(bd)        ((bd) & 0xFFFF)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_regs.h b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_regs.h
index a6e0b4d64..e5ffeb272 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_regs.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_regs.h
@@ -186,6 +186,12 @@ enum S3CHIPTAGS {
 #define MEM_SS1                     0x40    /*CRCA_6 :Secondary stream 1*/
 #define MEM_SS2                     0x80    /*CRCA_7 :Secondary stream 2*/
 
+/*
+ * There are two different streams engines used in the Savage line.
+ * The old engine is in the 3D, 4, Pro, and Twister.
+ * The new engine is in the 2000, MX, IX, and Super.
+ */
+
 /* Stream Processor 1 */
 
 /* Primary Stream 1 Frame Buffer Address 0 */
@@ -277,6 +283,35 @@ enum S3CHIPTAGS {
 /* Secondary Stream 2 Opaque Overlay Control */
 #define SEC_STREAM2_OPAQUE_OVERLAY      0x8180
 
+/* streams registers for old engine */
+#define PSTREAM_CONTROL_REG		0x8180
+#define COL_CHROMA_KEY_CONTROL_REG	0x8184
+#define SSTREAM_CONTROL_REG		0x8190
+#define CHROMA_KEY_UPPER_BOUND_REG	0x8194
+#define SSTREAM_STRETCH_REG		0x8198
+#define COLOR_ADJUSTMENT_REG		0x819C
+#define BLEND_CONTROL_REG		0x81A0
+#define PSTREAM_FBADDR0_REG		0x81C0
+#define PSTREAM_FBADDR1_REG		0x81C4
+#define PSTREAM_STRIDE_REG		0x81C8
+#define DOUBLE_BUFFER_REG		0x81CC
+/* updated by peterzhu,original define is DOUBLE_BUFFER_REG*/
+#define MULTIPLE_BUFFER_REG		0x81CC
+#define SSTREAM_FBADDR0_REG		0x81D0
+#define SSTREAM_FBADDR1_REG		0x81D4
+#define SSTREAM_STRIDE_REG		0x81D8
+#define SSTREAM_VSCALE_REG		0x81E0
+#define SSTREAM_VINITIAL_REG		0x81E4
+#define SSTREAM_LINES_REG		0x81E8
+#define STREAMS_FIFO_REG		0x81EC
+#define PSTREAM_WINDOW_START_REG	0x81F0
+#define PSTREAM_WINDOW_SIZE_REG		0x81F4
+#define SSTREAM_WINDOW_START_REG	0x81F8
+#define SSTREAM_WINDOW_SIZE_REG		0x81FC
+#define FIFO_CONTROL			0x8200
+#define PSTREAM_FBSIZE_REG		0x8300
+#define SSTREAM_FBSIZE_REG		0x8304
+#define SSTREAM_FBADDR2_REG		0x8308
 
 #define SUBSYS_STAT_REG			0x8504
 
@@ -315,43 +350,6 @@ enum S3CHIPTAGS {
 
 
 /*
- * There are two different streams engines used in the Savage line.
- * The old engine is in the 3D, 4, Pro, and Twister.
- * The new engine is in the 2000, MX, IX, and Super.
- */
-
-/* streams registers for old engine */
-#define PSTREAM_CONTROL_REG		0x8180
-#define COL_CHROMA_KEY_CONTROL_REG	0x8184
-#define SSTREAM_CONTROL_REG		0x8190
-#define CHROMA_KEY_UPPER_BOUND_REG	0x8194
-#define SSTREAM_STRETCH_REG		0x8198
-#define COLOR_ADJUSTMENT_REG		0x819C
-#define BLEND_CONTROL_REG		0x81A0
-#define PSTREAM_FBADDR0_REG		0x81C0
-#define PSTREAM_FBADDR1_REG		0x81C4
-#define PSTREAM_STRIDE_REG		0x81C8
-#define DOUBLE_BUFFER_REG		0x81CC
-/* updated by peterzhu,original define is DOUBLE_BUFFER_REG*/
-#define MULTIPLE_BUFFER_REG		0x81CC
-#define SSTREAM_FBADDR0_REG		0x81D0
-#define SSTREAM_FBADDR1_REG		0x81D4
-#define SSTREAM_STRIDE_REG		0x81D8
-#define SSTREAM_VSCALE_REG		0x81E0
-#define SSTREAM_VINITIAL_REG		0x81E4
-#define SSTREAM_LINES_REG		0x81E8
-#define STREAMS_FIFO_REG		0x81EC
-#define PSTREAM_WINDOW_START_REG	0x81F0
-#define PSTREAM_WINDOW_SIZE_REG		0x81F4
-#define SSTREAM_WINDOW_START_REG	0x81F8
-#define SSTREAM_WINDOW_SIZE_REG		0x81FC
-#define FIFO_CONTROL			0x8200
-#define PSTREAM_FBSIZE_REG		0x8300
-#define SSTREAM_FBSIZE_REG		0x8304
-#define SSTREAM_FBADDR2_REG		0x8308
-
-
-/*
  * CR88_4 =1 : disable block write
  * the "2D" is partly to set this apart from "BLOCK_WRITE_DISABLE"
  * constant used for bitmap  descriptor
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c
index 24de4fda9..ce911b44c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c
@@ -10,6 +10,15 @@
 #include "savage_regs.h"
 #include "savage_bci.h"
 
+/* AGD: Uncomment this to use the BCI copy planar data method on
+ * savages with the old streams engine.  It's off by default
+ * as it leaves artifacts on the screen when moving the output
+ * window. This may also be possible to use a similar method
+ * on chips using the new streams engine.  That remains to be
+ * seen.
+ */
+/*#define BCI_COPY_DATA 1*/
+
 #define OFF_DELAY 	200  /* milliseconds */
 #define FREE_DELAY 	60000
 
@@ -311,7 +320,10 @@ void SavageInitStreamsOld(ScrnInfoPtr pScrn)
     xf86ErrorFVerb(XVTRACE, "SavageInitStreams\n" );
 
     /* Primary stream reflects the frame buffer. */
-
+#if 0 
+/* I don't know if these are needed here or not.  seems to work either way
+ * and the stride should have already been set properly in SavageSetGBD()
+ */
     if (!psav->bTiled) {
         OUTREG(PRI_STREAM_STRIDE,
                  (((psav->lDelta * 2) << 16) & 0x3FFFE000) |
@@ -330,7 +342,7 @@ void SavageInitStreamsOld(ScrnInfoPtr pScrn)
     }
     OUTREG(PSTREAM_FBSIZE_REG, 
 		pScrn->virtualY * pScrn->virtualX * (pScrn->bitsPerPixel >> 3));
-
+#endif
     switch( pScrn->depth ) {
     case  8: format = 0 << 24; break;
     case 15: format = 3 << 24; break;
@@ -393,7 +405,10 @@ void SavageInitStreamsNew(ScrnInfoPtr pScrn)
     ) {
 	OverlayParamInit( pScrn );
     }
-
+#if 0
+/* I don't know if these are needed here or not.  seems to work either way
+ * and the stride should have already been set properly in SavageSetGBD()
+ */
     /* Primary stream reflects the frame buffer. */
     OUTREG32(PRI_STREAM_FBUF_ADDR0, pScrn->fbOffset);
     if (!psav->bTiled) {
@@ -414,7 +429,7 @@ void SavageInitStreamsNew(ScrnInfoPtr pScrn)
     }
     OUTREG(PSTREAM_FBSIZE_REG,
              pScrn->virtualX * pScrn->virtualY * (pScrn->bitsPerPixel >> 3));
-
+#endif
     /* Primary stream reflects the frame buffer. */
 
     jDelta = pScrn->displayWidth * pScrn->bitsPerPixel / 8;
@@ -1144,9 +1159,10 @@ SavageQueryBestSize(
     if(*p_w > 16384) *p_w = 16384;
 }
 
+#ifdef BCI_COPY_DATA
 /* SavageCopyPlanarDataOld() causes artifacts on the screen when used. 
  * It's probably something with the BCI.  Maybe we need a waitforidle() or
- * something 
+ * something...
  */
 static void
 SavageCopyPlanarDataOld(
@@ -1227,6 +1243,7 @@ SavageCopyPlanarDataOld(
     BCI_SEND(0x00200003 | srcPitch);
     BCI_SEND(0xC0170000);
 }
+#endif
 
 static void
 SavageCopyData(
@@ -1682,8 +1699,7 @@ SavagePutImage(
 	offsetU += tmp;
 	offsetV += tmp; 
 	nlines = ((((y2 + 0xffff) >> 16) + 1) & ~1) - top;
-#if 0   /* SavageCopyPlanarDataOld() causes artifacts on the screen when used 
-         * probably something with the BCI */
+#ifdef BCI_COPY_DATA
         if (S3_SAVAGE4_SERIES(psav->Chipset)) {
             SavageCopyPlanarDataOld(
                 pScrn,
@@ -1692,14 +1708,18 @@ SavagePutImage(
 	    	buf + offsetU, 
 	    	dst_start, srcPitch, srcPitch2, dstPitch, nlines, npixels);
         } else {
-#endif
 	    SavageCopyPlanarData(
 	    	buf + (top * srcPitch) + (left >> 1), 
 	    	buf + offsetV, 
 	    	buf + offsetU, 
 	    	dst_start, srcPitch, srcPitch2, dstPitch, nlines, npixels);
-#if 0
         }
+#else
+	SavageCopyPlanarData(
+	    buf + (top * srcPitch) + (left >> 1), 
+	    buf + offsetV, 
+	    buf + offsetU, 
+	    dst_start, srcPitch, srcPitch2, dstPitch, nlines, npixels);
 #endif
 	break;
     case FOURCC_Y211:		/* Y211 */