diff options
7 files changed, 552 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/dal/Makefile b/drivers/gpu/drm/amd/dal/Makefile index f1cc942c725f..bfa934085e3b 100644 --- a/drivers/gpu/drm/amd/dal/Makefile +++ b/drivers/gpu/drm/amd/dal/Makefile @@ -7,7 +7,7 @@ AMDDALPATH = $(RELATIVE_AMD_DAL_PATH) subdir-ccflags-y += -I$(AMDDALPATH)/ -I$(AMDDALPATH)/include -DDAL_CZ_BRINGUP -DAL_LIBS = amdgpu_dm basics +DAL_LIBS = amdgpu_dm asic_capability basics AMD_DAL = $(addsuffix /Makefile, $(addprefix $(FULL_AMD_DAL_PATH)/,$(DAL_LIBS))) diff --git a/drivers/gpu/drm/amd/dal/asic_capability/Makefile b/drivers/gpu/drm/amd/dal/asic_capability/Makefile new file mode 100644 index 000000000000..d993f875f12e --- /dev/null +++ b/drivers/gpu/drm/amd/dal/asic_capability/Makefile @@ -0,0 +1,22 @@ +# +# Makefile for the 'asic_capability' sub-component of DAL. +# + +ASIC_CAPABILITY = asic_capability.o + +AMD_DAL_ASIC_CAPABILITY = \ + $(addprefix $(AMDDALPATH)/asic_capability/,$(ASIC_CAPABILITY)) + +AMD_DAL_FILES += $(AMD_DAL_ASIC_CAPABILITY) + +############################################################################### +# DCE 11x +############################################################################### +ifdef CONFIG_DRM_AMD_DAL_DCE11_0 +ASIC_CAPABILITY_DCE11 = carrizo_asic_capability.o + +AMD_DAL_ASIC_CAPABILITY_DCE11 = \ + $(addprefix $(AMDDALPATH)/asic_capability/,$(ASIC_CAPABILITY_DCE11)) + +AMD_DAL_FILES += $(AMD_DAL_ASIC_CAPABILITY_DCE11) +endif diff --git a/drivers/gpu/drm/amd/dal/asic_capability/asic_capability.c b/drivers/gpu/drm/amd/dal/asic_capability/asic_capability.c new file mode 100644 index 000000000000..ecee5aa62afe --- /dev/null +++ b/drivers/gpu/drm/amd/dal/asic_capability/asic_capability.c @@ -0,0 +1,174 @@ +/* + * Copyright 2012-15 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#include "dal_services.h" + +#include "include/logger_interface.h" + +#include "include/asic_capability_interface.h" +#include "include/asic_capability_types.h" +#include "include/dal_types.h" +#include "include/dal_asic_id.h" + + +#if defined(CONFIG_DRM_AMD_DAL_DCE11_0) +#include "carrizo_asic_capability.h" +#endif + +/* + * Initializes asic_capability instance. + */ +static bool construct( + struct asic_capability *cap, + struct hw_asic_id *init, + struct dal_context *dal_context) +{ + bool asic_supported = false; + + cap->dal_context = dal_context; + dal_memset(cap->data, 0, sizeof(cap->data)); + + /* ASIC data */ + cap->data[ASIC_DATA_VRAM_TYPE] = init->vram_type; + cap->data[ASIC_DATA_VRAM_BITWIDTH] = init->vram_width; + cap->data[ASIC_DATA_FEATURE_FLAGS] = init->feature_flags; + cap->runtime_flags = init->runtime_flags; + cap->data[ASIC_DATA_REVISION_ID] = init->hw_internal_rev; + cap->data[ASIC_DATA_MAX_UNDERSCAN_PERCENTAGE] = 10; + cap->data[ASIC_DATA_VIEWPORT_PIXEL_GRANULARITY] = 4; + cap->data[ASIC_DATA_SUPPORTED_HDMI_CONNECTION_NUM] = 1; + cap->data[ASIC_DATA_NUM_OF_VIDEO_PLANES] = 0; + cap->data[ASIC_DATA_DEFAULT_I2C_SPEED_IN_KHZ] = 25; + + /* ASIC basic capability */ + cap->caps.UNDERSCAN_FOR_HDMI_ONLY = true; + cap->caps.SUPPORT_CEA861E_FINAL = true; + cap->caps.MIRABILIS_SUPPORTED = false; + cap->caps.MIRABILIS_ENABLED_BY_DEFAULT = false; + cap->caps.WIRELESS_LIMIT_TO_720P = false; + cap->caps.WIRELESS_FULL_TIMING_ADJUSTMENT = false; + cap->caps.WIRELESS_TIMING_ADJUSTMENT = true; + cap->caps.WIRELESS_COMPRESSED_AUDIO = false; + cap->caps.VCE_SUPPORTED = false; + cap->caps.HPD_CHECK_FOR_EDID = false; + cap->caps.NO_VCC_OFF_HPD_POLLING = false; + cap->caps.NEED_MC_TUNING = false; + cap->caps.SUPPORT_8BPP = true; + + /* ASIC stereo 3D capability */ + cap->stereo_3d_caps.SUPPORTED = true; + + switch (init->chip_family) { + case FAMILY_CI: + break; + + case FAMILY_KV: + break; + + case FAMILY_CZ: +#if defined(CONFIG_DRM_AMD_DAL_DCE11_0) + carrizo_asic_capability_create(cap); + asic_supported = true; +#endif + break; + + default: + /* unsupported "chip_family" */ + break; + } + + if (false == asic_supported) { + dal_logger_write(dal_context->logger, + LOG_MAJOR_ERROR, + LOG_MINOR_MASK_ALL, + "%s: ASIC not supported!\n", __func__); + } + + return asic_supported; +} + +static void destruct( + struct asic_capability *cap) +{ + /* nothing to do (yet?) */ +} + +/* + * dal_asic_capability_create + * + * Creates asic capability based on DCE version. + */ +struct asic_capability *dal_asic_capability_create( + struct hw_asic_id *init, + struct dal_context *dal_context) +{ + struct asic_capability *cap; + + if (!init) { + BREAK_TO_DEBUGGER(); + return NULL; + } + + cap = dal_alloc(sizeof(struct asic_capability)); + + if (!cap) { + BREAK_TO_DEBUGGER(); + return NULL; + } + + if (construct(cap, init, dal_context)) + return cap; + + BREAK_TO_DEBUGGER(); + + dal_free(cap); + + return NULL; +} + +/* + * dal_asic_capability_destroy + * + * Destroy allocated memory. + */ +void dal_asic_capability_destroy( + struct asic_capability **cap) +{ + if (!cap) { + BREAK_TO_DEBUGGER(); + return; + } + + if (!*cap) { + BREAK_TO_DEBUGGER(); + return; + } + + destruct(*cap); + + dal_free(*cap); + + *cap = NULL; +} diff --git a/drivers/gpu/drm/amd/dal/asic_capability/carrizo_asic_capability.c b/drivers/gpu/drm/amd/dal/asic_capability/carrizo_asic_capability.c new file mode 100644 index 000000000000..067b9d362ad8 --- /dev/null +++ b/drivers/gpu/drm/amd/dal/asic_capability/carrizo_asic_capability.c @@ -0,0 +1,128 @@ +/* + * Copyright 2012-15 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#include "dal_services.h" + +#include "include/asic_capability_interface.h" +#include "include/asic_capability_types.h" + +#include "carrizo_asic_capability.h" + +#include "dce/dce_11_0_d.h" +#include "smu/smu_8_0_d.h" +#include "dce/dce_11_0_sh_mask.h" + +#define ixVCE_HARVEST_FUSE_MACRO__ADDRESS 0xC0014074 + +/* + * carrizo_asic_capability_create + * + * Create and initiate Carrizo capability. + */ +void carrizo_asic_capability_create(struct asic_capability *cap) +{ + uint32_t e_fuse_setting; + /* ASIC data */ + cap->data[ASIC_DATA_CONTROLLERS_NUM] = 3; + cap->data[ASIC_DATA_FUNCTIONAL_CONTROLLERS_NUM] = 3; + cap->data[ASIC_DATA_LINEBUFFER_NUM] = 3; + cap->data[ASIC_DATA_PATH_NUM_PER_DPMST_CONNECTOR] = 4; + cap->data[ASIC_DATA_DCE_VERSION] = 0x110; /* DCE 11 */ + cap->data[ASIC_DATA_LINEBUFFER_SIZE] = 1712 * 144; + cap->data[ASIC_DATA_DRAM_BANDWIDTH_EFFICIENCY] = 45; + cap->data[ASIC_DATA_CLOCKSOURCES_NUM] = 2; + cap->data[ASIC_DATA_MC_LATENCY] = 5000; + cap->data[ASIC_DATA_STUTTERMODE] = 0x200A; + cap->data[ASIC_DATA_VIEWPORT_PIXEL_GRANULARITY] = 2; + cap->data[ASIC_DATA_MAX_COFUNC_NONDP_DISPLAYS] = 2; + cap->data[ASIC_DATA_MEMORYTYPE_MULTIPLIER] = 2; + cap->data[ASIC_DATA_DEFAULT_I2C_SPEED_IN_KHZ] = 100; + cap->data[ASIC_DATA_NUM_OF_VIDEO_PLANES] = 1; + cap->data[ASIC_DATA_SUPPORTED_HDMI_CONNECTION_NUM] = 3; + + /* ASIC basic capability */ + cap->caps.IS_FUSION = true; + cap->caps.DP_MST_SUPPORTED = true; + cap->caps.PANEL_SELF_REFRESH_SUPPORTED = true; + cap->caps.MIRABILIS_SUPPORTED = true; + cap->caps.NO_VCC_OFF_HPD_POLLING = true; + cap->caps.VCE_SUPPORTED = true; + cap->caps.HPD_CHECK_FOR_EDID = true; + cap->caps.DFSBYPASS_DYNAMIC_SUPPORT = true; + cap->caps.SUPPORT_8BPP = false; + + /* ASIC stereo 3d capability */ + cap->stereo_3d_caps.DISPLAY_BASED_ON_WS = true; + cap->stereo_3d_caps.HDMI_FRAME_PACK = true; + cap->stereo_3d_caps.INTERLACE_FRAME_PACK = true; + cap->stereo_3d_caps.DISPLAYPORT_FRAME_PACK = true; + cap->stereo_3d_caps.DISPLAYPORT_FRAME_ALT = true; + cap->stereo_3d_caps.INTERLEAVE = true; + + e_fuse_setting = dal_read_index_reg(cap->dal_context,CGS_IND_REG__SMC,ixVCE_HARVEST_FUSE_MACRO__ADDRESS); + /* Bits [28:27]*/ + switch ((e_fuse_setting >> 27) & 0x3) { + case 0: + /*both VCE engine are working*/ + cap->caps.VCE_SUPPORTED = true; + cap->caps.WIRELESS_TIMING_ADJUSTMENT = false; + /*TODO: + cap->caps.wirelessLowVCEPerformance = false; + m_AsicCaps.vceInstance0Enabled = true; + m_AsicCaps.vceInstance1Enabled = true;*/ + cap->caps.NEED_MC_TUNING = true; + break; + + case 1: + cap->caps.VCE_SUPPORTED = true; + cap->caps.WIRELESS_TIMING_ADJUSTMENT = true; + /*TODO: + m_AsicCaps.wirelessLowVCEPerformance = false; + m_AsicCaps.vceInstance1Enabled = true;*/ + cap->caps.NEED_MC_TUNING = true; + break; + + case 2: + cap->caps.VCE_SUPPORTED = true; + cap->caps.WIRELESS_TIMING_ADJUSTMENT = true; + /*TODO: + m_AsicCaps.wirelessLowVCEPerformance = false; + m_AsicCaps.vceInstance0Enabled = true;*/ + cap->caps.NEED_MC_TUNING = true; + break; + + case 3: + /* VCE_DISABLE = 0x3 - both VCE + * instances are in harvesting, + * no VCE supported any more. + */ + cap->caps.VCE_SUPPORTED = false; + break; + + default: + break; + } + +} diff --git a/drivers/gpu/drm/amd/dal/asic_capability/carrizo_asic_capability.h b/drivers/gpu/drm/amd/dal/asic_capability/carrizo_asic_capability.h new file mode 100644 index 000000000000..59d237f7040c --- /dev/null +++ b/drivers/gpu/drm/amd/dal/asic_capability/carrizo_asic_capability.h @@ -0,0 +1,35 @@ +/* + * Copyright 2012-15 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#ifndef __DAL_CARRIZO_ASIC_CAPABILITY_H__ +#define __DAL_CARRIZO_ASIC_CAPABILITY_H__ + +/* Forward declaration */ +struct asic_capability; + +/* Create and initialize Carrizo data */ +void carrizo_asic_capability_create(struct asic_capability *cap); + +#endif /* __DAL_CARRIZO_ASIC_CAPABILITY_H__ */ diff --git a/drivers/gpu/drm/amd/dal/include/asic_capability_interface.h b/drivers/gpu/drm/amd/dal/include/asic_capability_interface.h new file mode 100644 index 000000000000..e9bbaf8c0567 --- /dev/null +++ b/drivers/gpu/drm/amd/dal/include/asic_capability_interface.h @@ -0,0 +1,58 @@ +/* + * Copyright 2012-15 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of enc software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and enc permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#ifndef __DAL_ASIC_CAPABILITY_INTERFACE_H__ +#define __DAL_ASIC_CAPABILITY_INTERFACE_H__ + +/* Include */ +#include "include/asic_capability_types.h" + +/* Forward declaration */ +struct hw_asic_id; + + +/* ASIC capability */ +struct asic_capability { + struct dal_context *dal_context; + struct asic_caps caps; + struct asic_stereo_3d_caps stereo_3d_caps; + struct asic_bugs bugs; + struct dal_asic_runtime_flags runtime_flags; + uint32_t data[ASIC_DATA_MAX_NUMBER]; +}; + + +/** + * Interfaces + */ + +/* Create and initialize ASIC capability */ +struct asic_capability *dal_asic_capability_create(struct hw_asic_id *init, + struct dal_context *dal_context); + +/* Destroy ASIC capability and free memory space */ +void dal_asic_capability_destroy(struct asic_capability **cap); + +#endif /* __DAL_ASIC_CAPABILITY_INTERFACE_H__ */ diff --git a/drivers/gpu/drm/amd/dal/include/asic_capability_types.h b/drivers/gpu/drm/amd/dal/include/asic_capability_types.h new file mode 100644 index 000000000000..1cb977618bdf --- /dev/null +++ b/drivers/gpu/drm/amd/dal/include/asic_capability_types.h @@ -0,0 +1,134 @@ +/* + * Copyright 2012-15 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ +#ifndef __DAL_ASIC_CAPABILITY_TYPES_H__ +#define __DAL_ASIC_CAPABILITY_TYPES_H__ + +/* + * ASIC Capabilities + */ +struct asic_caps { + bool CONSUMER_SINGLE_SELECTED_TIMING:1; + bool UNDERSCAN_ADJUST:1; + bool DELTA_SIGMA_SUPPORT:1; + bool PANEL_SELF_REFRESH_SUPPORTED:1; + bool IS_FUSION:1; + bool DP_MST_SUPPORTED:1; + bool UNDERSCAN_FOR_HDMI_ONLY:1; + bool DVI_CLOCK_SHARE_CAPABILITY:1; + bool SUPPORT_CEA861E_FINAL:1; + bool MIRABILIS_SUPPORTED:1; + bool MIRABILIS_ENABLED_BY_DEFAULT:1; + bool DEVICE_TAG_REMAP_SUPPORTED:1; + bool HEADLESS_NO_OPM_SUPPORTED:1; + bool WIRELESS_LIMIT_TO_720P:1; + bool WIRELESS_FULL_TIMING_ADJUSTMENT:1; + bool WIRELESS_TIMING_ADJUSTMENT:1; + bool WIRELESS_COMPRESSED_AUDIO:1; + bool VCE_SUPPORTED:1; + bool HPD_CHECK_FOR_EDID:1; + bool NO_VCC_OFF_HPD_POLLING:1; + bool NEED_MC_TUNING:1; + bool SKIP_PSR_WAIT_FOR_PLL_LOCK_BIT:1; + bool DFSBYPASS_DYNAMIC_SUPPORT:1; + bool SUPPORT_8BPP:1; +}; + + +/* + * ASIC Stereo 3D Caps + */ +struct asic_stereo_3d_caps { + bool SUPPORTED:1; + bool DISPLAY_BASED_ON_WS:1; + bool HDMI_FRAME_PACK:1; + bool INTERLACE_FRAME_PACK:1; + bool DISPLAYPORT_FRAME_PACK:1; + bool DISPLAYPORT_FRAME_ALT:1; + bool INTERLEAVE:1; +}; + + +/* + * ASIC Bugs + */ +struct asic_bugs { + bool MST_SYMBOL_MISALIGNMENT:1; + bool PSR_2X_LANE_GANGING:1; + bool LB_WA_IS_SUPPORTED:1; + bool ROM_REGISTER_ACCESS:1; + bool PSR_WA_OVERSCAN_CRC_ERROR:1; +}; + + +/* + * ASIC Data + */ +enum asic_data { + ASIC_DATA_FIRST = 0, + ASIC_DATA_CONTROLLERS_NUM = ASIC_DATA_FIRST, + ASIC_DATA_FUNCTIONAL_CONTROLLERS_NUM, + ASIC_DATA_DCE_VERSION, + ASIC_DATA_DCE_VERSION_MINOR, + ASIC_DATA_VRAM_TYPE, + ASIC_DATA_VRAM_BITWIDTH, + ASIC_DATA_FEATURE_FLAGS, + ASIC_DATA_LINEBUFFER_NUM, + ASIC_DATA_LINEBUFFER_SIZE, + ASIC_DATA_DRAM_BANDWIDTH_EFFICIENCY, + ASIC_DATA_MC_LATENCY, + ASIC_DATA_MC_LATENCY_SLOW, + ASIC_DATA_CLOCKSOURCES_NUM, + ASIC_DATA_MEMORYTYPE_MULTIPLIER, + ASIC_DATA_STUTTERMODE, + ASIC_DATA_PATH_NUM_PER_DPMST_CONNECTOR, + ASIC_DATA_MAX_COFUNC_NONDP_DISPLAYS, + ASIC_DATA_REVISION_ID, + ASIC_DATA_MAX_UNDERSCAN_PERCENTAGE, + ASIC_DATA_VIEWPORT_PIXEL_GRANULARITY, + ASIC_DATA_DIGFE_NUM, + ASIC_DATA_SUPPORTED_HDMI_CONNECTION_NUM, + ASIC_DATA_MIN_DISPCLK_FOR_UNDERSCAN, + ASIC_DATA_NUM_OF_VIDEO_PLANES, + ASIC_DATA_DEFAULT_I2C_SPEED_IN_KHZ, + ASIC_DATA_MAX_NUMBER /* end of enum */ +}; + + +/* + * ASIC Feature Flags + */ +struct asic_feature_flags { + union { + uint32_t raw; + struct { + uint32_t LEGACY_CLIENT:1; + uint32_t PACKED_PIXEL_FORMAT:1; + uint32_t WORKSTATION_STEREO:1; + uint32_t WORKSTATION:1; + } bits; + }; +}; + +#endif /* __DAL_ASIC_CAPABILITY_TYPES_H__ */ |