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authorAbdiel Janulgue <abdiel.janulgue@linux.intel.com>2014-12-30 10:21:00 +0200
committerAbdiel Janulgue <abdiel.janulgue@linux.intel.com>2015-09-11 10:53:25 +0300
commit20267b522d06a84a4ac8c113f02d56fb6b0990eb (patch)
tree10f316ab1c24abad442fe7111633d6fab64514ff
parent6099d52d00375440412d3733c5e14d39b5461376 (diff)
i965: Assign hw-binding table index for each UBO constant buffer.
To be able to refer to a constant buffer, the resource streamer needs to index it with a hardware binding table entry. This blankets the ubo buffers with hardware binding table indices. Gather constants hardware fetches in 16-entry binding table blocks. So we need to use a block that is unused. Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h11
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c6
2 files changed, 17 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index de0db5afd0..58edaf4588 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -762,6 +762,17 @@ struct brw_vs_prog_data {
#define SURF_INDEX_GEN6_SOL_BINDING(t) (t)
+/** Start of hardware binding table index for uniform gather constant entries.
+ * This must be aligned to the start of a hardware binding table block (a block
+ * is a group 16 binding table entries).
+ */
+#define BRW_UNIFORM_GATHER_INDEX_START 32
+
+/** Appended to the end of the binding table index for uniform constant buffers
+ * to indicate start of the UBO gather constant binding table.
+ */
+#define BRW_UBO_GATHER_INDEX_APPEND 2
+
/* Note: brw_gs_prog_data_compare() must be updated when adding fields to
* this struct!
*/
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 8213f4ea2f..fab553b820 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -917,6 +917,12 @@ brw_upload_ubo_surfaces(struct brw_context *brw,
bo->size - binding->Offset,
&surf_offsets[i],
dword_pitch);
+ if (brw->gather_pool.bo) {
+ int bt_idx = BRW_UNIFORM_GATHER_INDEX_START +
+ BRW_UBO_GATHER_INDEX_APPEND + i;
+ gen7_edit_hw_binding_table_entry(brw, stage_state->stage,
+ bt_idx, surf_offsets[i]);
+ }
}
if (shader->NumUniformBlocks)