diff options
author | Elie Tournier <tournier.elie@gmail.com> | 2017-05-30 10:33:22 +0100 |
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committer | Elie Tournier <tournier.elie@gmail.com> | 2017-05-30 10:33:22 +0100 |
commit | 959b5a192044b41fee06c5b72a25fa00c2e199b9 (patch) | |
tree | 05644c9dd31a04f31c8f161c07cc5eb85e91dbd8 | |
parent | dd55dc64a73ff2f8072fb4d1980d02f048daf1a1 (diff) |
glsl: Add "built-in" functions to do le(fp64,fp64)
Signed-off-by: Elie Tournier <tournier.elie@gmail.com>
-rw-r--r-- | src/compiler/glsl/builtin_float64.h | 183 | ||||
-rw-r--r-- | src/compiler/glsl/builtin_functions.cpp | 4 | ||||
-rw-r--r-- | src/compiler/glsl/builtin_functions.h | 3 | ||||
-rw-r--r-- | src/compiler/glsl/float64.glsl | 50 | ||||
-rw-r--r-- | src/compiler/glsl/glcpp/glcpp-parse.y | 1 |
5 files changed, 241 insertions, 0 deletions
diff --git a/src/compiler/glsl/builtin_float64.h b/src/compiler/glsl/builtin_float64.h index 06a6160e7f..074059c6ef 100644 --- a/src/compiler/glsl/builtin_float64.h +++ b/src/compiler/glsl/builtin_float64.h @@ -214,3 +214,186 @@ feq64(void *mem_ctx, builtin_available_predicate avail) sig->replace_parameters(&sig_parameters); return sig; } +ir_function_signature * +extractFloat64Sign(void *mem_ctx, builtin_available_predicate avail) +{ + ir_function_signature *const sig = + new(mem_ctx) ir_function_signature(glsl_type::uint_type, avail); + ir_factory body(&sig->body, mem_ctx); + sig->is_defined = true; + + exec_list sig_parameters; + + ir_variable *const r0041 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in); + sig_parameters.push_tail(r0041); + ir_expression *const r0042 = rshift(swizzle_y(r0041), body.constant(int(31))); + body.emit(ret(r0042)); + + sig->replace_parameters(&sig_parameters); + return sig; +} +ir_function_signature * +le64(void *mem_ctx, builtin_available_predicate avail) +{ + ir_function_signature *const sig = + new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail); + ir_factory body(&sig->body, mem_ctx); + sig->is_defined = true; + + exec_list sig_parameters; + + ir_variable *const r0043 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in); + sig_parameters.push_tail(r0043); + ir_variable *const r0044 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in); + sig_parameters.push_tail(r0044); + ir_variable *const r0045 = new(mem_ctx) ir_variable(glsl_type::uint_type, "b0", ir_var_function_in); + sig_parameters.push_tail(r0045); + ir_variable *const r0046 = new(mem_ctx) ir_variable(glsl_type::uint_type, "b1", ir_var_function_in); + sig_parameters.push_tail(r0046); + ir_expression *const r0047 = less(r0043, r0045); + ir_expression *const r0048 = equal(r0043, r0045); + ir_expression *const r0049 = lequal(r0044, r0046); + ir_expression *const r004A = logic_and(r0048, r0049); + ir_expression *const r004B = logic_or(r0047, r004A); + body.emit(ret(r004B)); + + sig->replace_parameters(&sig_parameters); + return sig; +} +ir_function_signature * +fle64(void *mem_ctx, builtin_available_predicate avail) +{ + ir_function_signature *const sig = + new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail); + ir_factory body(&sig->body, mem_ctx); + sig->is_defined = true; + + exec_list sig_parameters; + + ir_variable *const r004C = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in); + sig_parameters.push_tail(r004C); + ir_variable *const r004D = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in); + sig_parameters.push_tail(r004D); + ir_variable *const r004E = body.make_temp(glsl_type::bool_type, "return_value"); + ir_variable *const r004F = new(mem_ctx) ir_variable(glsl_type::bool_type, "isbNaN", ir_var_auto); + body.emit(r004F); + ir_variable *const r0050 = new(mem_ctx) ir_variable(glsl_type::bool_type, "isaNaN", ir_var_auto); + body.emit(r0050); + ir_variable *const r0051 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "frac", ir_var_auto); + body.emit(r0051); + body.emit(assign(r0051, bit_and(swizzle_y(r004C), body.constant(1048575u)), 0x02)); + + body.emit(assign(r0051, swizzle_x(r004C), 0x01)); + + ir_variable *const r0052 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "frac", ir_var_auto); + body.emit(r0052); + body.emit(assign(r0052, bit_and(swizzle_y(r004D), body.constant(1048575u)), 0x02)); + + body.emit(assign(r0052, swizzle_x(r004D), 0x01)); + + ir_expression *const r0053 = rshift(swizzle_y(r004C), body.constant(int(20))); + ir_expression *const r0054 = bit_and(r0053, body.constant(2047u)); + ir_expression *const r0055 = expr(ir_unop_u2i, r0054); + ir_expression *const r0056 = equal(r0055, body.constant(int(2047))); + ir_expression *const r0057 = bit_or(swizzle_y(r0051), swizzle_x(r004C)); + ir_expression *const r0058 = nequal(r0057, body.constant(0u)); + body.emit(assign(r0050, logic_and(r0056, r0058), 0x01)); + + ir_expression *const r0059 = rshift(swizzle_y(r004D), body.constant(int(20))); + ir_expression *const r005A = bit_and(r0059, body.constant(2047u)); + ir_expression *const r005B = expr(ir_unop_u2i, r005A); + ir_expression *const r005C = equal(r005B, body.constant(int(2047))); + ir_expression *const r005D = bit_or(swizzle_y(r0052), swizzle_x(r004D)); + ir_expression *const r005E = nequal(r005D, body.constant(0u)); + body.emit(assign(r004F, logic_and(r005C, r005E), 0x01)); + + /* IF CONDITION */ + ir_expression *const r0060 = logic_or(r0050, r004F); + ir_if *f005F = new(mem_ctx) ir_if(operand(r0060).val); + exec_list *const f005F_parent_instructions = body.instructions; + + /* THEN INSTRUCTIONS */ + body.instructions = &f005F->then_instructions; + + body.emit(assign(r004E, body.constant(false), 0x01)); + + + /* ELSE INSTRUCTIONS */ + body.instructions = &f005F->else_instructions; + + ir_variable *const r0061 = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval"); + body.emit(assign(r0061, rshift(swizzle_y(r004C), body.constant(int(31))), 0x01)); + + ir_variable *const r0062 = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval"); + body.emit(assign(r0062, rshift(swizzle_y(r004D), body.constant(int(31))), 0x01)); + + /* IF CONDITION */ + ir_expression *const r0064 = nequal(r0061, r0062); + ir_if *f0063 = new(mem_ctx) ir_if(operand(r0064).val); + exec_list *const f0063_parent_instructions = body.instructions; + + /* THEN INSTRUCTIONS */ + body.instructions = &f0063->then_instructions; + + ir_expression *const r0065 = nequal(r0061, body.constant(0u)); + ir_expression *const r0066 = bit_or(swizzle_y(r004C), swizzle_y(r004D)); + ir_expression *const r0067 = lshift(r0066, body.constant(int(1))); + ir_expression *const r0068 = bit_or(r0067, swizzle_x(r004C)); + ir_expression *const r0069 = bit_or(r0068, swizzle_x(r004D)); + ir_expression *const r006A = equal(r0069, body.constant(0u)); + body.emit(assign(r004E, logic_or(r0065, r006A), 0x01)); + + + /* ELSE INSTRUCTIONS */ + body.instructions = &f0063->else_instructions; + + ir_variable *const r006B = body.make_temp(glsl_type::bool_type, "conditional_tmp"); + /* IF CONDITION */ + ir_expression *const r006D = nequal(r0061, body.constant(0u)); + ir_if *f006C = new(mem_ctx) ir_if(operand(r006D).val); + exec_list *const f006C_parent_instructions = body.instructions; + + /* THEN INSTRUCTIONS */ + body.instructions = &f006C->then_instructions; + + ir_expression *const r006E = less(swizzle_y(r004D), swizzle_y(r004C)); + ir_expression *const r006F = equal(swizzle_y(r004D), swizzle_y(r004C)); + ir_expression *const r0070 = lequal(swizzle_x(r004D), swizzle_x(r004C)); + ir_expression *const r0071 = logic_and(r006F, r0070); + body.emit(assign(r006B, logic_or(r006E, r0071), 0x01)); + + + /* ELSE INSTRUCTIONS */ + body.instructions = &f006C->else_instructions; + + ir_expression *const r0072 = less(swizzle_y(r004C), swizzle_y(r004D)); + ir_expression *const r0073 = equal(swizzle_y(r004C), swizzle_y(r004D)); + ir_expression *const r0074 = lequal(swizzle_x(r004C), swizzle_x(r004D)); + ir_expression *const r0075 = logic_and(r0073, r0074); + body.emit(assign(r006B, logic_or(r0072, r0075), 0x01)); + + + body.instructions = f006C_parent_instructions; + body.emit(f006C); + + /* END IF */ + + body.emit(assign(r004E, r006B, 0x01)); + + + body.instructions = f0063_parent_instructions; + body.emit(f0063); + + /* END IF */ + + + body.instructions = f005F_parent_instructions; + body.emit(f005F); + + /* END IF */ + + body.emit(ret(r004E)); + + sig->replace_parameters(&sig_parameters); + return sig; +} diff --git a/src/compiler/glsl/builtin_functions.cpp b/src/compiler/glsl/builtin_functions.cpp index 13cb28538c..f38f993797 100644 --- a/src/compiler/glsl/builtin_functions.cpp +++ b/src/compiler/glsl/builtin_functions.cpp @@ -3260,6 +3260,10 @@ builtin_builder::create_builtins() generate_ir::feq64(mem_ctx, integer_functions_supported), NULL); + add_function("__builtin_fle64", + generate_ir::fle64(mem_ctx, integer_functions_supported), + NULL); + #undef F #undef FI #undef FIUD_VEC diff --git a/src/compiler/glsl/builtin_functions.h b/src/compiler/glsl/builtin_functions.h index f77fac3c48..35b28000c0 100644 --- a/src/compiler/glsl/builtin_functions.h +++ b/src/compiler/glsl/builtin_functions.h @@ -72,6 +72,9 @@ fneg64(void *mem_ctx, builtin_available_predicate avail); ir_function_signature * feq64(void *mem_ctx, builtin_available_predicate avail); +ir_function_signature * +fle64(void *mem_ctx, builtin_available_predicate avail); + } #endif /* BULITIN_FUNCTIONS_H */ diff --git a/src/compiler/glsl/float64.glsl b/src/compiler/glsl/float64.glsl index 5e969c64a3..770264184b 100644 --- a/src/compiler/glsl/float64.glsl +++ b/src/compiler/glsl/float64.glsl @@ -92,3 +92,53 @@ feq64(uvec2 a, uvec2 b) return (a.x == b.x) && ((a.y == b.y) || ((a.x == 0u) && (((a.y | b.y)<<1) == 0u))); } + +/* Returns the sign bit of the double-precision floating-point value `a'.*/ +uint +extractFloat64Sign(uvec2 a) +{ + return (a.y>>31); +} + +/* Returns true if the 64-bit value formed by concatenating `a0' and `a1' is less + * than or equal to the 64-bit value formed by concatenating `b0' and `b1'. + * Otherwise, returns false. + */ +bool +le64(uint a0, uint a1, uint b0, uint b1) +{ + return (a0 < b0) || ((a0 == b0) && (a1 <= b1)); +} + +/* Returns true if the double-precision floating-point value `a' is less than or + * equal to the corresponding value `b', and false otherwise. The comparison is + * performed according to the IEEE Standard for Floating-Point Arithmetic. + */ +bool +fle64(uvec2 a, uvec2 b) +{ + uint aSign; + uint bSign; + uvec2 aFrac; + uvec2 bFrac; + bool isaNaN; + bool isbNaN; + + aFrac = extractFloat64Frac(a); + bFrac = extractFloat64Frac(b); + isaNaN = (extractFloat64Exp(a) == 0x7FF) && + ((aFrac.y | aFrac.x) != 0u); + isbNaN = (extractFloat64Exp(b) == 0x7FF) && + ((bFrac.y | bFrac.x) != 0u); + + if (isaNaN || isbNaN) + return false; + + aSign = extractFloat64Sign(a); + bSign = extractFloat64Sign(b); + if (aSign != bSign) + return (aSign != 0u) || (((((a.y | b.y)<<1)) | a.x | b.x) == 0u); + + return (aSign != 0u) ? le64(b.y, b.x, a.y, a.x) + : le64(a.y, a.x, b.y, b.x); +} diff --git a/src/compiler/glsl/glcpp/glcpp-parse.y b/src/compiler/glsl/glcpp/glcpp-parse.y index 7bb6e72ae5..e41f8dd7fe 100644 --- a/src/compiler/glsl/glcpp/glcpp-parse.y +++ b/src/compiler/glsl/glcpp/glcpp-parse.y @@ -2353,6 +2353,7 @@ _glcpp_parser_handle_version_declaration(glcpp_parser_t *parser, intmax_t versio add_builtin_define(parser, "__have_builtin_builtin_fabs64", 1); add_builtin_define(parser, "__have_builtin_builtin_fneg64", 1); add_builtin_define(parser, "__have_builtin_builtin_feq64", 1); + add_builtin_define(parser, "__have_builtin_builtin_fle64", 1); } } |