From 7edfe7de41a92be43893e34cdf6f81839d5888a1 Mon Sep 17 00:00:00 2001 From: Thomas Klausner Date: Thu, 6 Aug 2015 14:02:43 +0200 Subject: Use correct type for variable. Fixes many warnings of this type: xgi.h:1016:14: note: expected 'XGIIOADDRESS' but argument is of type 'PUCHAR' Signed-off-by: Thomas Klausner Reviewed-by: Connor Behan --- src/vb_i2c.c | 38 +++++++++++++++++++------------------- src/vgatypes.h | 2 +- 2 files changed, 20 insertions(+), 20 deletions(-) diff --git a/src/vb_i2c.c b/src/vb_i2c.c index d238d90..90e4630 100755 --- a/src/vb_i2c.c +++ b/src/vb_i2c.c @@ -114,7 +114,7 @@ typedef enum _I2C_ACCESS_CMD #define ENABLE_GPIOC 0x04 VOID EnableGPIOA( -PUCHAR pjIOPort, I2C_ACCESS_CMD CmdType) +XGIIOADDRESS pjIOPort, I2C_ACCESS_CMD CmdType) { PDEBUGI2C(ErrorF("EnableGPIOA()-pjIOPort=0x%x...\n", pjIOPort)); @@ -134,7 +134,7 @@ PUCHAR pjIOPort, I2C_ACCESS_CMD CmdType) VOID EnableGPIOB( -PUCHAR pjIOPort, I2C_ACCESS_CMD CmdType) +XGIIOADDRESS pjIOPort, I2C_ACCESS_CMD CmdType) { UCHAR ujCR4A = XGI_GetReg(pjIOPort, IND_CR4A_GPIO_REG_III); @@ -152,7 +152,7 @@ PUCHAR pjIOPort, I2C_ACCESS_CMD CmdType) VOID EnableGPIOC( -PUCHAR pjIOPort, I2C_ACCESS_CMD CmdType) +XGIIOADDRESS pjIOPort, I2C_ACCESS_CMD CmdType) { UCHAR ujCR4A = XGI_GetReg(pjIOPort, IND_CR4A_GPIO_REG_III); @@ -1174,8 +1174,8 @@ UCHAR ReverseUCHAR(UCHAR data) *************************************************************************/ VOID vWriteClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data) { - UCHAR temp; - PUCHAR pjI2cIOBase; + UCHAR temp; + XGIIOADDRESS pjI2cIOBase; PDEBUGI2C(ErrorF("vWriteClockLineDVI()...begin\n")); @@ -1224,8 +1224,8 @@ VOID vWriteClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data) *************************************************************************/ VOID vWriteDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data) { - UCHAR temp; - PUCHAR pjI2cIOBase; + UCHAR temp; + XGIIOADDRESS pjI2cIOBase; PDEBUGI2C(ErrorF("vWriteDataLineDVI()...begin\n")); @@ -1277,8 +1277,8 @@ VOID vWriteDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data) *************************************************************************/ BOOLEAN bReadClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE) { - UCHAR cPortData; - PUCHAR pjI2cIOBase; + UCHAR cPortData; + XGIIOADDRESS pjI2cIOBase; PDEBUGI2C(ErrorF("bReadClockLineDVI()...begin\n")); @@ -1318,7 +1318,7 @@ BOOLEAN bReadClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE) BOOLEAN bReadDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE) { UCHAR cPortData; - PUCHAR pjI2cIOBase; + XGIIOADDRESS pjI2cIOBase; PDEBUGI2C(ErrorF("bReadDataLineDVI()...begin\n")); @@ -1357,7 +1357,7 @@ BOOLEAN bReadDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE) //*************************************************************************// VOID vWaitForCRT1HsyncActive(PXGI_HW_DEVICE_INFO pHWDE) { - PUCHAR pjPort = pHWDE->pjIOAddress + INPUT_STATUS_1_COLOR; + XGIIOADDRESS pjPort = pHWDE->pjIOAddress + INPUT_STATUS_1_COLOR; ULONG i; for (i = 0; i < 0x00FFFF; i++) @@ -1398,7 +1398,7 @@ VOID vWaitForCRT1HsyncActive(PXGI_HW_DEVICE_INFO pHWDE) VOID vWriteClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data) { UCHAR temp, ujSR1F; - PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; + XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; PDEBUGI2C(ErrorF("I2C:Write CRT clock = %x\n", data & 1)); @@ -1433,7 +1433,7 @@ VOID vWriteClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data) VOID vWriteDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data) { UCHAR temp, ujSR1F; - PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; + XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; PDEBUGI2C(ErrorF("I2C:Write CRT data = %x\n", data & 1)); @@ -1467,7 +1467,7 @@ VOID vWriteDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data) BOOLEAN bReadClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE) { UCHAR cPortData; - PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; + XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; cPortData = XGI_GetReg(pjI2cIOBase, IND_SR11_DDC_REG); cPortData = GETBITS(cPortData, 0:0); @@ -1489,7 +1489,7 @@ BOOLEAN bReadClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE) BOOLEAN bReadDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE) { UCHAR cPortData; - PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; + XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; cPortData = XGI_GetReg(pjI2cIOBase, IND_SR11_DDC_REG); cPortData = GETBITS(cPortData, 1:1); @@ -1517,7 +1517,7 @@ BOOLEAN bReadDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE) VOID vWriteClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data) { UCHAR temp; - PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; + XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; PDEBUGI2C(ErrorF("I2C:Write FCNT clock = %x\n", data & 1)); @@ -1541,7 +1541,7 @@ VOID vWriteClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data) VOID vWriteDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data) { UCHAR temp, temp2, temp3; - PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; + XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; PDEBUGI2C(ErrorF("I2C:Write FCNT data = %x\n", data & 1)); @@ -1565,7 +1565,7 @@ VOID vWriteDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data) BOOLEAN bReadClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE) { UCHAR cPortData; - PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; + XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; cPortData = XGI_GetReg(pjI2cIOBase, IND_SR11_DDC_REG); cPortData = GETBITS(cPortData, 2:2); @@ -1587,7 +1587,7 @@ BOOLEAN bReadClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE) BOOLEAN bReadDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE) { UCHAR cPortData; - PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; + XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT; cPortData = XGI_GetReg(pjI2cIOBase, IND_SR11_DDC_REG); cPortData = GETBITS(cPortData, 3:3); diff --git a/src/vgatypes.h b/src/vgatypes.h index df002b8..6f1e20c 100755 --- a/src/vgatypes.h +++ b/src/vgatypes.h @@ -227,7 +227,7 @@ struct _XGI_HW_DEVICE_INFO ULONG ulVideoMemorySize; /* size, in bytes, of the memory on the board */ - PUCHAR pjIOAddress; /* base I/O address of VGA ports (0x3B0) */ + XGIIOADDRESS pjIOAddress; /* base I/O address of VGA ports (0x3B0) */ PUCHAR pjCustomizedROMImage; -- cgit v1.2.3