convert all hostbridge read/writes to accessor functions

6 files changed, 115 insertions, 33 deletions

diff --git a/src/init.c b/src/init.c
index 9f6bea0..93a317f 100644
--- a/src/init.c
+++ b/src/init.c
@@ -2505,7 +2505,7 @@ SiS_SetCRT1FIFO_630(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 #ifdef SIS_LINUX_KERNEL
    templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50);
 #else
-   templ = pciReadLong(0x00000000, 0x50);
+   templ = sis_pci_read_host_bridge_u32(0x50);
 #endif
 
    if(SiS_Pr->ChipType == SIS_730) {
@@ -2530,8 +2530,8 @@ SiS_SetCRT1FIFO_630(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
    sisfb_write_nbridge_pci_dword(SiS_Pr, 0x50, templ);
    templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xA0);
 #else
-   pciWriteLong(0x00000000, 0x50, templ);
-   templ = pciReadLong(0x00000000, 0xA0);
+   sis_pci_write_host_bridge_u32(0x50, templ);
+   templ = sis_pci_read_host_bridge_u32(0xA0);
 #endif
 
    /* GUI grant timer (PCI config 0xA3) */
@@ -2551,7 +2551,7 @@ SiS_SetCRT1FIFO_630(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 #ifdef SIS_LINUX_KERNEL
    sisfb_write_nbridge_pci_dword(SiS_Pr, 0xA0, templ);
 #else
-   pciWriteLong(0x00000000, 0xA0, templ);
+   sis_pci_write_host_bridge_u32(0xA0, templ);
 #endif
 }
 #endif /* SIS300 */
@@ -3190,8 +3190,8 @@ SiS_Handle760(struct SiS_Private *SiS_Pr)
    sisfb_write_nbridge_pci_byte(SiS_Pr, 0x7e, temp1);
    sisfb_write_nbridge_pci_byte(SiS_Pr, 0x8d, temp2);
 #else
-   pciWriteByte(0x00000000, 0x7e, temp1);
-   pciWriteByte(0x00000000, 0x8d, temp2);
+   sis_pci_write_host_bridge_u8(0x7e, temp1);
+   sis_pci_write_host_bridge_u8(0x8d, temp2);
 #endif
 
    SiS_SetRegByte((somebase + 0x85), temp3);
diff --git a/src/init301.c b/src/init301.c
index 161d8de..ea0861d 100644
--- a/src/init301.c
+++ b/src/init301.c
@@ -5220,8 +5220,8 @@ SiS_SetCRT2FIFO_300(struct SiS_Private *SiS_Pr,unsigned short ModeNo)
 	pci50 = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50);
 	pciA0 = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xa0);
 #else
-	pci50 = pciReadLong(0x00000000, 0x50);
-	pciA0 = pciReadLong(0x00000000, 0xA0);
+	pci50 = sis_pci_read_host_bridge_u32(0x50);
+	pciA0 = sis_pci_read_host_bridge_u32(0xA0);
 #endif
 
         if(SiS_Pr->ChipType == SIS_730) {
diff --git a/src/sis.h b/src/sis.h
index c9e01f8..0176323 100644
--- a/src/sis.h
+++ b/src/sis.h
@@ -1575,6 +1575,10 @@ extern int   SiS_GetTVyscale(ScrnInfoPtr pScrn);
 extern int   SiS_GetSISCRT1SaturationGain(ScrnInfoPtr pScrn);
 extern void  SiS_SetSISCRT1SaturationGain(ScrnInfoPtr pScrn, int val);
 
+extern unsigned int sis_pci_read_host_bridge_u32(int offset);
+extern unsigned char sis_pci_read_host_bridge_u8(int offset);
+extern void sis_pci_write_host_bridge_u8(int offset, unsigned char value);
+extern void sis_pci_write_host_bridge_u32(int offset, unsigned int value);
 #endif  /* _SIS_H_ */
 
 
diff --git a/src/sis_dac.c b/src/sis_dac.c
index 70cce7c..eff0900 100644
--- a/src/sis_dac.c
+++ b/src/sis_dac.c
@@ -545,8 +545,8 @@ SiS300Save(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 
     /* Save FQBQ and GUI timer settings */
     if(pSiS->Chipset == PCI_CHIP_SIS630) {
-       sisReg->sisRegsPCI50 = pciReadLong(0x00000000, 0x50);
-       sisReg->sisRegsPCIA0 = pciReadLong(0x00000000, 0xA0);
+       sisReg->sisRegsPCI50 = sis_pci_read_host_bridge_u32(0x50);
+       sisReg->sisRegsPCIA0 = sis_pci_read_host_bridge_u32(0xA0);
 #ifdef TWDEBUG
        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		"PCI Config 50 = %lx\n", sisReg->sisRegsPCI50);
@@ -687,9 +687,9 @@ SiS300Restore(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 
     /* Restore FQBQ and GUI timer settings */
     if(pSiS->Chipset == PCI_CHIP_SIS630) {
-       temp1 = pciReadLong(0x00000000, 0x50);
-       temp2 = pciReadLong(0x00000000, 0xA0);
-       if(pciReadLong(0x00000000, 0x00) == 0x06301039) {
+       temp1 = sis_pci_read_host_bridge_u32(0x50);
+       temp2 = sis_pci_read_host_bridge_u32(0xA0);
+       if(sis_pci_read_host_bridge_u32(0x00) == 0x06301039) {
           temp1 &= 0xf0ffffff;
           temp1 |= (sisReg->sisRegsPCI50 & ~0xf0ffffff);
 	  temp2 &= 0xf0ffffff;
@@ -700,8 +700,8 @@ SiS300Restore(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 	  temp2 &= 0x00ffffff;
           temp2 |= (sisReg->sisRegsPCIA0 & ~0x00ffffff);
        }
-       pciWriteLong(0x00000000, 0x50, temp1);
-       pciWriteLong(0x00000000, 0xA0, temp2);
+       sis_pci_write_host_bridge_u32(0x50, temp1);
+       sis_pci_write_host_bridge_u32(0xA0, temp2);
     }
 
     /* Restore panel link/video bridge registers */
diff --git a/src/sis_driver.c b/src/sis_driver.c
index ee59aec..be1f059 100644
--- a/src/sis_driver.c
+++ b/src/sis_driver.c
@@ -3774,7 +3774,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
 	  break;
        case PCI_CHIP_SIS630: /* 630 + 730 */
 	  pSiS->ChipType = SIS_630;
-	  if(pciReadLong(0x00000000, 0x00) == 0x07301039) {
+	  if(sis_pci_read_host_bridge_u32(0x00) == 0x07301039) {
 	     pSiS->ChipType = SIS_730;
 	  }
 	  pSiS->SiS_SD_Flags |= SiS_SD_IS300SERIES;
@@ -3813,7 +3813,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
 	  break;
        case PCI_CHIP_SIS650: /* 650 + 740 */
 	  pSiS->ChipType = SIS_650;
-	  if(pciReadLong(0x00000000, 0x00) == 0x07401039) {
+	  if(sis_pci_read_host_bridge_u32(0x00) == 0x07401039) {
 	     pSiS->ChipType = SIS_740;
 	  }
 	  pSiS->ChipFlags |= (SiSCF_Integrated | SiSCF_Real256ECore | SiSCF_MMIOPalette);
@@ -3831,7 +3831,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
 	  break;
        case PCI_CHIP_SIS660: /* 660, 661, 741, 760, 761, 670(?) */
 	  {
-	     ULong hpciid = pciReadLong(0x00000000, 0x00);
+	     ULong hpciid = sis_pci_read_host_bridge_u32(0x00);
 	     switch(hpciid) {
 	     case 0x06601039:
 		pSiS->ChipType = SIS_660;
@@ -4072,7 +4072,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
        case PCI_CHIP_SIS6326:
 	  pSiS->oldChipset = OC_SIS6326; break;
        case PCI_CHIP_SIS530:
-	  if(pciReadLong(0x00000000, 0x00) == 0x06201039) {
+	  if(sis_pci_read_host_bridge_u32(0x00) == 0x06201039) {
 	     pSiS->oldChipset = OC_SIS620;
 	  } else {
 	     if((pSiS->ChipRev & 0x0f) < 0x0a)
diff --git a/src/sis_setup.c b/src/sis_setup.c
index 62922b4..ea670ef 100644
--- a/src/sis_setup.c
+++ b/src/sis_setup.c
@@ -99,6 +99,84 @@ static const struct _sis6326mclk {
 	{134, 0, 0x4a, 0xa3 }
 };
 
+#ifdef XSERVER_LIBPCIACCESS
+struct pci_device *
+sis_host_bridge (void)
+{
+    static const struct pci_slot_match bridge_match = {
+	0, 0, 0, PCI_MATCH_ANY, 0
+    };
+    struct pci_device_iterator	*slot_iterator;
+    struct pci_device		*bridge;
+
+    slot_iterator = pci_slot_match_iterator_create (&bridge_match);
+    bridge = pci_device_next (slot_iterator);
+    pci_iterator_destroy (slot_iterator);
+    return bridge;
+}
+
+unsigned int
+sis_pci_read_host_bridge_u32(int offset)
+{
+    struct pci_device host_bridge = sis_host_bridge();
+    unsigned int result;
+
+    pci_device_cfg_read_u32(host_bridge, &result, offset);
+    return result;
+}
+
+unsigned char
+sis_pci_read_host_bridge_u32(int offset)
+{
+    struct pci_device host_bridge = sis_host_bridge();
+    unsigned char result;
+
+    pci_device_cfg_read_u8(host_bridge, &result, offset);
+    return result;
+}
+
+void
+sis_pci_write_host_bridge_u32(int offset, unsigned int value)
+{
+    struct pci_device host_bridge = sis_host_bridge();
+    pci_device_cfg_write_u32(host_bridge, value, offset);
+}
+
+void
+sis_pci_write_host_bridge_u8(int offset, unsigned char value)
+{
+    struct pci_device host_bridge = sis_host_bridge();
+    pci_device_cfg_write_u8(host_bridge, value, offset);
+}
+   
+#else
+unsigned int
+sis_pci_read_host_bridge_u32(int offset)
+{
+    return pciReadLong(0x00000000, offset);
+}
+
+unsigned char
+sis_pci_read_host_bridge_u8(int offset)
+{
+    return pciReadByte(0x00000000, offset);
+}
+
+void
+sis_pci_write_host_bridge_u32(int offset, unsigned int value)
+{
+    pciWriteLong(0x00000000, offset, value);
+}
+
+void
+sis_pci_write_host_bridge_u8(int offset, unsigned char value)
+{
+    pciWriteByte(0x00000000, offset, value);
+}
+
+
+#endif
+   
 static int sisESSPresent(ScrnInfoPtr pScrn)
 {
   int flags = 0;
@@ -320,20 +398,20 @@ sis300Setup(ScrnInfoPtr pScrn)
     case PCI_CHIP_SIS540:
     case PCI_CHIP_SIS630:
 	pSiS->IsAGPCard = TRUE;
-	pciconfig = pciReadByte(0x00000000, 0x63);
+	pciconfig = sis_pci_read_host_bridge_u8(0x63);
 	if(pciconfig & 0x80) {
 	   pScrn->videoRam = (1 << (((pciconfig & 0x70) >> 4) + 21)) / 1024;
 	   pSiS->BusWidth = 64;
-	   pciconfig = pciReadByte(0x00000000, 0x64);
+	   pciconfig = sis_pci_read_host_bridge_u8(0x64);
 	   if((pciconfig & 0x30) == 0x30) {
 	      pSiS->BusWidth = 128;
 	      pScrn->videoRam <<= 1;
 	   }
-	   ramtype = pciReadByte(0x00000000,0x65);
+	   ramtype = sis_pci_read_host_bridge_u8(0x65);
 	   ramtype &= 0x03;
 	   xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
 		"Shared Memory Area is on DIMM%d\n", ramtype);
-	   ramtype = pciReadByte(0x00000000,(0x60 + ramtype));
+	   ramtype = sis_pci_read_host_bridge_u8(0x60 + ramtype);
 	   if(ramtype & 0x80) ramtype = 9;
 	   else               ramtype = 4;
 	   pSiS->UMAsize = pScrn->videoRam;
@@ -599,7 +677,7 @@ sis550Setup(ScrnInfoPtr pScrn)
 
 	  /* UMA - shared fb */
 	  pScrn->videoRam = 0;
-	  pciconfig = pciReadByte(0x00000000, 0x4c);
+	  pciconfig = sis_pci_read_host_bridge_u8(0x4c);
 	  if(pciconfig & 0xe0) {
 	     pScrn->videoRam = (1 << (((pciconfig & 0xe0) >> 5) - 2)) * 32768;
 	     pSiS->ChipFlags |= SiSCF_760UMA;
@@ -611,6 +689,7 @@ sis550Setup(ScrnInfoPtr pScrn)
 	  }
 
 	  /* LFB - local framebuffer: PCI reg hold total RAM (but configurable in BIOS) */
+	  /* TODO */
 	  pciconfig = pciReadByte(0x00000800, 0xcd);
 	  pciconfig = (pciconfig >> 1) & 0x03;
 	  i = 0;
@@ -662,7 +741,7 @@ sis550Setup(ScrnInfoPtr pScrn)
 	     dimmnum = 3;
 	  }
 
-	  pciconfig = pciReadByte(0x00000000, 0x64);
+	  pciconfig = sis_pci_read_host_bridge_u8(0x64);
 	  if(pciconfig & 0x80) {
 	     pScrn->videoRam = (1 << (((pciconfig & 0x70) >> 4) - 1)) * 32768;
 	     pSiS->UMAsize = pScrn->videoRam;
@@ -674,7 +753,7 @@ sis550Setup(ScrnInfoPtr pScrn)
 		pSiS->BusWidth = 64;
 		for(i = 0; i <= (dimmnum - 1); i++) {
 		   if(pciconfig & (1 << i)) {
-		      temp = pciReadByte(0x00000000, 0x60 + i);
+		      temp = sis_pci_read_host_bridge_u8(0x60 + i);
 		      xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
 			  "DIMM%d is %s SDRAM\n",
 			  i, (temp & 0x40) ? "DDR" : "SDR");
@@ -683,7 +762,7 @@ sis550Setup(ScrnInfoPtr pScrn)
 			  "DIMM%d is not installed\n", i);
 		   }
 		}
-		pciconfig = pciReadByte(0x00000000, 0x7c);
+		pciconfig = sis_pci_read_host_bridge_u8(0x7c);
 		ramtype = (pciconfig & 0x02) ? 8 : 4;
 		alldone = TRUE;
 	     }
@@ -693,14 +772,14 @@ sis550Setup(ScrnInfoPtr pScrn)
 
     } else if(pSiS->Chipset == PCI_CHIP_SIS650) {
 
-       pciconfig = pciReadByte(0x00000000, 0x64);
+       pciconfig = sis_pci_read_host_bridge_u8(0x64);
        if(pciconfig & 0x80) {
           pScrn->videoRam = (1 << (((pciconfig & 0x70) >> 4) + 22)) / 1024;
 	  pSiS->UMAsize = pScrn->videoRam;
 	  pSiS->BusWidth = 64;
 	  for(i=0; i<=3; i++) {
 	     if(pciconfig & (1 << i)) {
-		temp = pciReadByte(0x00000000, 0x60 + i);
+		temp = sis_pci_read_host_bridge_u8(0x60 + i);
 		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
 		   "DIMM%d is %s SDRAM\n",
 		   i, (temp & 0x40) ? "DDR" : "SDR");
@@ -709,20 +788,19 @@ sis550Setup(ScrnInfoPtr pScrn)
 		   "DIMM%d is not installed\n", i);
 	     }
 	  }
-	  pciconfig = pciReadByte(0x00000000, 0x7c);
+	  pciconfig = sis_pci_read_host_bridge_u8(0x7c);
 	  if(pciconfig & 0x02) ramtype = 8;
 	  else                 ramtype = 4;
 	  alldone = TRUE;
        }
 
     } else {
-
-       pciconfig = pciReadByte(0x00000000, 0x63);
+       pciconfig = sis_pci_read_host_bridge_u8(0x63);
        if(pciconfig & 0x80) {
 	  pScrn->videoRam = (1 << (((pciconfig & 0x70) >> 4) + 21)) / 1024;
 	  pSiS->UMAsize = pScrn->videoRam;
 	  pSiS->BusWidth = 64;
-	  ramtype = pciReadByte(0x00000000,0x65);
+          ramtype = sis_pci_read_host_bridge_u8(0x65);
 	  ramtype &= 0x01;
 	  xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
 	   	"Shared Memory Area is on DIMM%d\n", ramtype);