inital SiS pci access patch

6 files changed, 344 insertions, 42 deletions

diff --git a/configure.ac b/configure.ac
index f4cc38c..0d99151 100644
--- a/configure.ac
+++ b/configure.ac
@@ -101,6 +101,19 @@ fi
 # technically this should be a configure flag.  meh.
 AC_DEFINE(XF86EXA, 1, [Build support for Exa])
 
+SAVE_CPPFLAGS="$CPPFLAGS"
+CPPFLAGS="$CPPFLAGS $XORG_CFLAGS"
+AC_CHECK_DECL(XSERVER_LIBPCIACCESS,
+              [XSERVER_LIBPCIACCESS=yes],[XSERVER_LIBPCIACCESS=no],
+              [#include "xorg-server.h"])
+CPPFLAGS="$SAVE_CPPFLAGS"
+
+if test "x$XSERVER_LIBPCIACCESS" = xyes; then
+    PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.8.0])
+    XORG_CFLAGS="$XORG_CFLAGS $PCIACCESS_CFLAGS"
+fi
+AM_CONDITIONAL(XSERVER_LIBPCIACCESS, test "x$XSERVER_LIBPCIACCESS" = xyes)
+
 AC_SUBST([DRI_CFLAGS])
 AC_SUBST([XORG_CFLAGS])
 AC_SUBST([moduledir])
diff --git a/src/sis.h b/src/sis.h
index f17b5cb..34cf9c2 100644
--- a/src/sis.h
+++ b/src/sis.h
@@ -40,6 +40,8 @@
 #include <math.h>
 #include <setjmp.h>
 
+#include <sispcirename.h>
+
 #define SISDRIVERVERSIONYEAR    5
 #define SISDRIVERVERSIONMONTH   9
 #define SISDRIVERVERSIONDAY     20
diff --git a/src/sis_dri.c b/src/sis_dri.c
index 4ce678f..0e4bf19 100644
--- a/src/sis_dri.c
+++ b/src/sis_dri.c
@@ -59,8 +59,10 @@ extern Bool drmSiSAgpInit(int driSubFD, int offset, int size);
 #ifdef XORG_VERSION_CURRENT
 #define SISHAVECREATEBUSID
 #if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(6,7,99,1,0)
+#ifndef XSERVER_LIBPCIACCESS
 extern char *DRICreatePCIBusID(pciVideoPtr PciInfo);
 #endif
+#endif
 #else
 # if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,4,99,9,0)
 # undef SISHAVECREATEBUSID
diff --git a/src/sis_driver.c b/src/sis_driver.c
index 3cc3be8..bec15a3 100644
--- a/src/sis_driver.c
+++ b/src/sis_driver.c
@@ -614,6 +614,7 @@ SISProbe(DriverPtr drv, int flags)
      * All of the cards this driver supports are PCI, so the "probing" just
      * amounts to checking the PCI data that the server has already collected.
      */
+#ifndef XSERVER_LIBPCIACCESS
     if(xf86GetPciVideoInfo() == NULL) {
        /*
         * We won't let anything in the config file override finding no
@@ -621,6 +622,7 @@ SISProbe(DriverPtr drv, int flags)
         */
        return FALSE;
     }
+#endif
 
     numUsedSiS = xf86MatchPciInstances(SIS_NAME, PCI_VENDOR_SIS,
 			SISChipsets, SISPciChipsets, devSections,
@@ -2983,7 +2985,7 @@ SiS_MapVGAMem(ScrnInfoPtr pScrn)
        /* If card is secondary or if a0000-address decoding
         * is disabled, set Phys to beginning of our video RAM.
 	*/
-       pSiS->VGAMapPhys = pSiS->PciInfo->memBase[0];
+       pSiS->VGAMapPhys = PCI_REGION_BASE(pSiS->PciInfo, 0, REGION_MEM);
     }
     if(!SiSVGAMapMem(pScrn)) {
        xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
@@ -3380,10 +3382,13 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
 
     /* Find the PCI info for this screen */
     pSiS->PciInfo = xf86GetPciInfoForEntity(pSiS->pEnt->index);
-    pSiS->PciBus = ((pciConfigPtr)pSiS->PciInfo->thisCard)->busnum;    /*SIS_PCI_BUS(pSiS->PciInfo);*/
-    pSiS->PciDevice = ((pciConfigPtr)pSiS->PciInfo->thisCard)->devnum; /*SIS_PCI_DEVICE(pSiS->PciInfo);*/
-    pSiS->PciFunc = ((pciConfigPtr)pSiS->PciInfo->thisCard)->funcnum;  /*SIS_PCI_FUNC(pSiS->PciInfo);*/
-    pSiS->PciTag = ((pciConfigPtr)pSiS->PciInfo->thisCard)->tag;       /*SIS_PCI_TAG(pSiS->PciInfo);*/
+    pSiS->PciBus = PCI_CFG_BUS(pSiS->PciInfo);    /*SIS_PCI_BUS(pSiS->PciInfo);*/
+    pSiS->PciDevice = PCI_CFG_DEV(pSiS->PciInfo); /*SIS_PCI_DEVICE(pSiS->PciInfo);*/
+    pSiS->PciFunc = PCI_CFG_FUNC(pSiS->PciInfo);  /*SIS_PCI_FUNC(pSiS->PciInfo);*/
+
+    pSiS->PciTag = pciTag(PCI_DEV_BUS(pSiS->PciInfo),
+			  PCI_DEV_DEV(pSiS->PciInfo),
+			  PCI_DEV_FUNC(pSiS->PciInfo));
 
 #ifdef SIS_NEED_MAP_IOP
     /********************************************/
@@ -3433,7 +3438,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
     {
        SymTabRec *myChipsets = SISChipsets;
 
-       if(pSiS->PciInfo->vendor == PCI_VENDOR_XGI) {
+       if(PCI_DEV_VENDOR_ID(pSiS->PciInfo) == PCI_VENDOR_XGI) {
           myChipsets = XGIChipsets;
        }
 
@@ -3451,7 +3456,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
 								pSiS->Chipset);
        } else {
 
-          pSiS->Chipset = pSiS->PciInfo->chipType;
+          pSiS->Chipset = PCI_DEV_DEVICE_ID(pSiS->PciInfo);
           pScrn->chipset = (char *)xf86TokenToString(myChipsets, pSiS->Chipset);
 
        }
@@ -3464,7 +3469,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
 								pSiS->ChipRev);
     } else {
 
-       pSiS->ChipRev = pSiS->PciInfo->chipRev;
+       pSiS->ChipRev = PCI_DEV_REVISION(pSiS->PciInfo);
 
     }
 
@@ -3648,7 +3653,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
      * by the BIOS. So we can pretty much rely on that these
      * are enabled.
      */
-    pSiS->RelIO = (SISIOADDRESS)(pSiS->PciInfo->ioBase[2] + pSiS->IODBase);
+    pSiS->RelIO = (SISIOADDRESS)(PCI_REGION_BASE(pSiS->PciInfo, 2, REGION_IO) + pSiS->IODBase);
     xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Relocated I/O registers at 0x%lX\n",
            (ULong)pSiS->RelIO);
 
@@ -4522,7 +4527,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
        pSiS->FbAddress = pSiS->pEnt->device->MemBase;
        from = X_CONFIG;
     } else {
-       pSiS->FbAddress = pSiS->PciInfo->memBase[0] & 0xFFFFFFF0;
+       pSiS->FbAddress = PCI_REGION_BASE(pSiS->PciInfo, 0, REGION_MEM) & 0xFFFFFFF0;
        from = X_PROBED;
     }
 
@@ -4546,7 +4551,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
        pSiS->IOAddress = pSiS->pEnt->device->IOBase;
        from = X_CONFIG;
     } else {
-       pSiS->IOAddress = pSiS->PciInfo->memBase[1] & 0xFFFFFFF0;
+       pSiS->IOAddress = PCI_REGION_BASE(pSiS->PciInfo, 1, REGION_MEM) & 0xFFFFFFF0;
        from = X_PROBED;
     }
     xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX (size %ldK)\n",
@@ -5064,15 +5069,15 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
     if(pSiS->Chipset == PCI_CHIP_SIS630) {
        int i = 0;
        do {
-	  if(mychswtable[i].subsysVendor == pSiS->PciInfo->subsysVendor &&
-	     mychswtable[i].subsysCard == pSiS->PciInfo->subsysCard) {
+	  if(mychswtable[i].subsysVendor == PCI_SUB_VENDOR_ID(pSiS->PciInfo) &&
+	     mychswtable[i].subsysCard == PCI_SUB_DEVICE_ID(pSiS->PciInfo)) {
 	     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 	         "PCI subsystem ID found in list for Chrontel/GPIO setup:\n");
 	     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
 		 "\tVendor/Card: %s %s (ID %04x)\n",
 		  mychswtable[i].vendorName,
 		  mychswtable[i].cardName,
-		  pSiS->PciInfo->subsysCard);
+		  PCI_SUB_DEVICE_ID(pSiS->PciInfo));
 	     pSiS->SiS_Pr->SiS_ChSW = TRUE;
 	     break;
           }
@@ -5105,8 +5110,8 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
 	      ((!SiS_customttable[i].bioschksum) ||
 	       (pSiS->SiS_Pr->UseROM &&
 	       (SiS_customttable[i].bioschksum == chksum)))			      &&
-	      (SiS_customttable[i].pcisubsysvendor == pSiS->PciInfo->subsysVendor)      &&
-	      (SiS_customttable[i].pcisubsyscard == pSiS->PciInfo->subsysCard) ) {
+	      (SiS_customttable[i].pcisubsysvendor == PCI_SUB_VENDOR_ID(pSiS->PciInfo))      &&
+	      (SiS_customttable[i].pcisubsyscard == PCI_SUB_DEVICE_ID(pSiS->PciInfo)) ) {
 	     footprint = TRUE;
 	     for(j=0; j<5; j++) {
 	        if(SiS_customttable[i].biosFootprintAddr[j]) {
@@ -5834,14 +5839,14 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
 	     if(pSiS->SiS_Pr->PDC == -1) {
 		int i=0;
 		do {
-		   if(mypdctable[i].subsysVendor == pSiS->PciInfo->subsysVendor &&
-		      mypdctable[i].subsysCard == pSiS->PciInfo->subsysCard) {
+		   if(mypdctable[i].subsysVendor == PCI_SUB_VENDOR_ID(pSiS->PciInfo) &&
+		      mypdctable[i].subsysCard == PCI_SUB_DEVICE_ID(pSiS->PciInfo)) {
 			 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 			    "PCI card/vendor identified for non-default PanelDelayCompensation\n");
 			 xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
 			     "Vendor: %s, card: %s (ID %04x), PanelDelayCompensation: 0x%02x\n",
 			     mypdctable[i].vendorName, mypdctable[i].cardName,
-			     pSiS->PciInfo->subsysCard, mypdctable[i].pdc);
+			     PCI_SUB_DEVICE_ID(pSiS->PciInfo), mypdctable[i].pdc);
 			 if(pSiS->PDC == -1) {
 			    pSiS->PDC = mypdctable[i].pdc;
 			 } else {
@@ -7144,15 +7149,48 @@ SISMapIOPMem(ScrnInfoPtr pScrn)
         pSiSEnt->MapCountIOPBase++;
         if(!(pSiSEnt->IOPBase)) {
 	     /* Only map if not mapped previously */
+#ifndef XSERVER_LIBPCIACCESS
 	     pSiSEnt->IOPBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO,
 			pSiS->PciTag, pSiS->IOPAddress, 128);
+#else
+	     {
+	       void **result = (void **)&pSiSEnt->IOPBase;
+	       int err = pci_device_map_range(pSiS->PciInfo,
+					      pSiS->IOPAddress,
+					      128,
+					      PCI_DEV_MAP_FLAG_WRITABLE,
+					      result);
+
+	       if (err) {
+                 xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+                             "Unable to map IO aperture. %s (%d)\n",
+                             strerror (err), err);
+	       }
+	     }
+#endif
         }
         pSiS->IOPBase = pSiSEnt->IOPBase;
     } else
 #endif
-	pSiS->IOPBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
-			pSiS->PciTag, pSiS->IOPAddress, 128);
-
+#ifndef XSERVER_LIBPCIACCESS
+	     pSiS->IOPBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO,
+					   pSiS->PciTag, pSiS->IOPAddress, 128);
+#else
+	     {
+	       void **result = (void **)&pSiS->IOPBase;
+	       int err = pci_device_map_range(pSiS->PciInfo,
+					      pSiS->IOPAddress,
+					      128,
+					      PCI_DEV_MAP_FLAG_WRITABLE,
+					      result);
+
+	       if (err) {
+                 xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+                             "Unable to map IO aperture. %s (%d)\n",
+                             strerror (err), err);
+	       }
+	     }
+#endif
     if(pSiS->IOPBase == NULL) {
 	SISErrorLog(pScrn, "Could not map I/O port area\n");
 	return FALSE;
@@ -7222,14 +7260,46 @@ SISMapMem(ScrnInfoPtr pScrn)
         pSiSEnt->MapCountIOBase++;
         if(!(pSiSEnt->IOBase)) {
 	     /* Only map if not mapped previously */
+#ifndef XSERVER_LIBPCIACCESS
     	     pSiSEnt->IOBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
                          pSiS->PciTag, pSiS->IOAddress, (pSiS->mmioSize * 1024));
+#else
+	     void **result = (void **)&pSiSEnt->IOBase;
+	     int err = pci_device_map_range(pSiS->PciInfo,
+ 	                                    pSiS->IOAddress,
+	                                    (pSiS->mmioSize * 1024),
+                                            PCI_DEV_MAP_FLAG_WRITABLE,
+                                            result);
+
+             if (err) {
+                 xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+                             "Unable to map IO aperture. %s (%d)\n",
+                             strerror (err), err);
+	     }
+#endif
         }
         pSiS->IOBase = pSiSEnt->IOBase;
     } else
 #endif
+#ifndef XSERVER_LIBPCIACCESS
     	pSiS->IOBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
                         pSiS->PciTag, pSiS->IOAddress, (pSiS->mmioSize * 1024));
+#else
+       {
+	     void **result = (void **)&pSiSEnt->IOBase;
+	     int err = pci_device_map_range(pSiS->PciInfo,
+ 	                                    pSiS->IOAddress,
+	                                    (pSiS->mmioSize * 1024),
+                                            PCI_DEV_MAP_FLAG_WRITABLE,
+                                            result);
+
+             if (err) {
+                 xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+                             "Unable to map IO aperture. %s (%d)\n",
+                             strerror (err), err);
+	     }
+       }
+#endif
 
     if(pSiS->IOBase == NULL) {
     	SISErrorLog(pScrn, "Could not map MMIO area\n");
@@ -7246,14 +7316,42 @@ SISMapMem(ScrnInfoPtr pScrn)
         pSiSEnt->MapCountIOBaseDense++;
         if(!(pSiSEnt->IOBaseDense)) {
 	     /* Only map if not mapped previously */
+#ifndef XSERVER_LIBPCIACCESS
 	     pSiSEnt->IOBaseDense = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO,
                     pSiS->PciTag, pSiS->IOAddress, (pSiS->mmioSize * 1024));
+#else
+	     void **result = (void **)&pSiSEnt->IOBaseDense;
+	     int err = pci_device_map_range(pSiS->PciInfo,
+ 	                                    pSiS->IOAddress,
+	                                    (pSiS->mmioSize * 1024),
+                                            PCI_DEV_MAP_FLAG_WRITABLE,
+                                            result);
+
+             if (err) {
+                 xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+                             "Unable to map IO dense aperture. %s (%d)\n",
+                             strerror (err), err);
+#endif
 	}
 	pSiS->IOBaseDense = pSiSEnt->IOBaseDense;
     } else
 #endif
-    	pSiS->IOBaseDense = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO,
+#ifndef XSERVER_LIBPCIACCESS
+	     pSiS->IOBaseDense = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO,
                     pSiS->PciTag, pSiS->IOAddress, (pSiS->mmioSize * 1024));
+#else
+	     void **result = (void **)&pSiSEnt->IOBaseDense;
+	     int err = pci_device_map_range(pSiS->PciInfo,
+ 	                                    pSiS->IOAddress,
+	                                    (pSiS->mmioSize * 1024),
+                                            PCI_DEV_MAP_FLAG_WRITABLE,
+                                            result);
+
+             if (err) {
+                 xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+                             "Unable to map IO dense aperture. %s (%d)\n",
+                             strerror (err), err);
+#endif
 
     if(pSiS->IOBaseDense == NULL) {
        SISErrorLog(pScrn, "Could not map MMIO dense area\n");
@@ -7266,21 +7364,55 @@ SISMapMem(ScrnInfoPtr pScrn)
 	pSiSEnt->MapCountFbBase++;
 	if(!(pSiSEnt->FbBase)) {
 	     /* Only map if not mapped previously */
+#ifndef XSERVER_LIBPCIACCESS
 	     pSiSEnt->FbBase = pSiSEnt->RealFbBase =
 			xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
 			 pSiS->PciTag, (ULong)pSiS->realFbAddress,
 			 pSiS->FbMapSize);
+#else
+         int err = pci_device_map_range(pSiS->PciInfo,
+                                   (ULong)pSiS->realFbAddress,
+                                   pSiS->FbMapSize,
+                                   PCI_DEV_MAP_FLAG_WRITABLE |
+                                   PCI_DEV_MAP_FLAG_WRITE_COMBINE,
+                                   (void *)&pSiSEnt->FbBase);
+	if (err) {
+            xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+                        "Unable to map FB aperture. %s (%d)\n",
+                        strerror (err), err);
+            return FALSE;
+        }
+	pSiSEnt->RealFbBase = pSiSEnt->FbBase;
+#endif
 	}
 	pSiS->FbBase = pSiS->RealFbBase = pSiSEnt->FbBase;
 	/* Adapt FbBase (for DHM and SiS76x UMA skipping; dhmOffset is 0 otherwise) */
 	pSiS->FbBase += pSiS->dhmOffset;
     } else {
 #endif
-	pSiS->FbBase = pSiS->RealFbBase =
-		xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
+
+#ifndef XSERVER_LIBPCIACCESS
+      pSiSEnt->FbBase = pSiSEnt->RealFbBase =
+			xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
 			 pSiS->PciTag, (ULong)pSiS->realFbAddress,
 			 pSiS->FbMapSize);
+#else
+         int err = pci_device_map_range(pSiS->PciInfo,
+                                   (ULong)pSiS->realFbAddress,
+                                   pSiS->FbMapSize,
+                                   PCI_DEV_MAP_FLAG_WRITABLE |
+                                   PCI_DEV_MAP_FLAG_WRITE_COMBINE,
+                                   (void *)&pSiSEnt->FbBase);
+	if (err) {
+            xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+                        "Unable to map FB aperture. %s (%d)\n",
+                        strerror (err), err);
+            return FALSE;
+        }
+	pSiSEnt->RealFbBase = pSiSEnt->FbBase;
+#endif
 	pSiS->FbBase += pSiS->dhmOffset;
+
 #ifdef SISDUALHEAD
     }
 #endif
diff --git a/src/sis_setup.c b/src/sis_setup.c
index 58d929c..62922b4 100644
--- a/src/sis_setup.c
+++ b/src/sis_setup.c
@@ -99,6 +99,48 @@ static const struct _sis6326mclk {
 	{134, 0, 0x4a, 0xa3 }
 };
 
+static int sisESSPresent(ScrnInfoPtr pScrn)
+{
+  int flags = 0;
+#ifndef XSERVER_LIBPCIACCESS
+  int i;
+  pciConfigPtr pdptr, *systemPCIdevices = NULL;
+
+  if((systemPCIdevices = xf86GetPciConfigInfo())) {
+      i = 0;
+      while((pdptr = systemPCIdevices[i])) {
+	  if((pdptr->pci_vendor == 0x1274) &&
+	     ((pdptr->pci_device == 0x5000) ||
+	      ((pdptr->pci_device & 0xFFF0) == 0x1370))) {
+	      flags |= ESS137xPRESENT;
+	      break;
+	  }
+	  i++;
+      }
+  }
+  return flags;
+#else
+  struct pci_id_match id_match = { 0x1274, PCI_MATCH_ANY,
+				   PCI_MATCH_ANY, PCI_MATCH_ANY,
+				   PCI_MATCH_ANY, PCI_MATCH_ANY,
+				   0 };
+  struct pci_device_iterator *id_iterator;
+  struct pci_device *ess137x;
+
+  id_iterator = pci_id_match_iterator_create(&id_match);
+
+  ess137x = pci_device_next(id_iterator);  
+  while (ess137x) {
+      if ((ess137x->device_id == 0x5000) ||
+	  ((ess137x->device_id & 0xfff0) == 0x1370)) {
+	  flags |= ESS137xPRESENT;
+      }
+      ess137x = pci_device_next(id_iterator);  
+  }
+  return flags;
+#endif
+}
+
 /* For old chipsets, 5597, 6326, 530/620 */
 static void
 sisOldSetup(ScrnInfoPtr pScrn)
@@ -113,7 +155,7 @@ sisOldSetup(ScrnInfoPtr pScrn)
 #if 0
     UChar  newsr13, newsr28, newsr29;
 #endif
-    pciConfigPtr pdptr, *systemPCIdevices = NULL;
+
 
     if(pSiS->oldChipset <= OC_SIS6225) {
 	inSISIDXREG(SISSR, 0x0F, temp);
@@ -206,22 +248,11 @@ sisOldSetup(ScrnInfoPtr pScrn)
     pSiS->Flags &= ~(ESS137xPRESENT);
     if(pSiS->Chipset == PCI_CHIP_SIS530) {
        if(pSiS->oldChipset == OC_SIS530A) {
-          if((systemPCIdevices = xf86GetPciConfigInfo())) {
-	      i = 0;
-	      while((pdptr = systemPCIdevices[i])) {
-		 if((pdptr->pci_vendor == 0x1274) &&
-		    ((pdptr->pci_device == 0x5000) ||
-		     ((pdptr->pci_device & 0xFFF0) == 0x1370))) {
-		     pSiS->Flags |= ESS137xPRESENT;
-		     break;
-		 }
-		 i++;
-	      }
-	  }
-	  if(pSiS->Flags & ESS137xPRESENT) {
-	     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-		 "SiS530/620: Found ESS device\n");
-	  }
+	   pSiS->Flags |= sisESSPresent(pScrn);
+       }
+       if(pSiS->Flags & ESS137xPRESENT) {
+	   xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		      "SiS530/620: Found ESS device\n");
        }
     }
 
diff --git a/src/sispcirename.h b/src/sispcirename.h
new file mode 100644
index 0000000..c4beac6
--- /dev/null
+++ b/src/sispcirename.h
@@ -0,0 +1,122 @@
+/*
+ * Copyright 2007 George Sapountzis
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/**
+ * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess
+ * library. The main purpose being to facilitate source code compatibility.
+ */
+
+#ifndef SISPCIRENAME_H
+#define SISPCIRENAME_H
+
+enum region_type {
+    REGION_MEM,
+    REGION_IO 
+};
+
+#ifndef XSERVER_LIBPCIACCESS
+
+/* pciVideoPtr */
+#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor)
+#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType)
+#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->chipRev)
+
+#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor)
+#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard)
+
+#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus,    \
+                                    (_pcidev)->device, \
+                                    (_pcidev)->func)
+#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
+#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->device)
+#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
+
+/* pciConfigPtr */
+#define PCI_CFG_TAG(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->tag)
+#define PCI_CFG_BUS(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->busnum)
+#define PCI_CFG_DEV(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->devnum)
+#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum)
+
+/* region addr: xfree86 uses different fields for memory regions and I/O ports */
+#define PCI_REGION_BASE(_pcidev, _b, _type)             \
+    (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \
+                             : (_pcidev)->ioBase[(_b)])
+
+/* region size: xfree86 uses the log2 of the region size,
+ * but with zero meaning no region, not size of one XXX */
+#define PCI_REGION_SIZE(_pcidev, _b) \
+    (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0)
+
+/* read/write PCI configuration space */
+#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
+    *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset))
+
+#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
+    *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset))
+
+#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
+    pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value))
+
+#else /* XSERVER_LIBPCIACCESS */
+
+typedef struct pci_device *pciVideoPtr;
+
+#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id)
+#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id)
+#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->revision)
+
+#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id)
+#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id)
+
+/* pci-rework functions take a 'pci_device' parameter instead of a tag */
+#define PCI_DEV_TAG(_pcidev)        (_pcidev)
+
+/* PCI_DEV macros, typically used in printf's, add domain ? XXX */
+#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
+#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->dev)
+#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
+
+/* pci-rework functions take a 'pci_device' parameter instead of a tag */
+#define PCI_CFG_TAG(_pcidev)        (_pcidev)
+
+/* PCI_CFG macros, typically used in DRI init, contain the domain */
+#define PCI_CFG_BUS(_pcidev)      (((_pcidev)->domain << 8) | \
+                                    (_pcidev)->bus)
+#define PCI_CFG_DEV(_pcidev)       ((_pcidev)->dev)
+#define PCI_CFG_FUNC(_pcidev)      ((_pcidev)->func)
+
+#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr)
+#define PCI_REGION_SIZE(_pcidev, _b)        ((_pcidev)->regions[(_b)].size)
+
+#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
+    pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset))
+
+#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
+    pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset))
+
+#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
+    pci_device_cfg_write_u32((_pcidev), (_value), (_offset))
+
+#endif /* XSERVER_LIBPCIACCESS */
+
+#endif /* SISPCIRENAME_H */