summaryrefslogtreecommitdiff
path: root/src/gfx/i2c_acc.c
blob: bb9d8e567eeb07034db5bb1dabaa3bd5b449e59e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/i2c_acc.c,v 1.1tsi Exp $ */
/*
 * $Workfile: i2c_acc.c $
 *
 * This file contains routines to write to and read from the I2C bus using
 * the ACCESS.bus hardware in the SC1200. 
 *
 * NSC_LIC_ALTERNATIVE_PREAMBLE
 *
 * Revision 1.0
 *
 * National Semiconductor Alternative GPL-BSD License
 *
 * National Semiconductor Corporation licenses this software 
 * ("Software"):
 *
 *      Durango
 *
 * under one of the two following licenses, depending on how the 
 * Software is received by the Licensee.
 * 
 * If this Software is received as part of the Linux Framebuffer or
 * other GPL licensed software, then the GPL license designated 
 * NSC_LIC_GPL applies to this Software; in all other circumstances 
 * then the BSD-style license designated NSC_LIC_BSD shall apply.
 *
 * END_NSC_LIC_ALTERNATIVE_PREAMBLE */

/* NSC_LIC_BSD
 *
 * National Semiconductor Corporation Open Source License for Durango
 *
 * (BSD License with Export Notice)
 *
 * Copyright (c) 1999-2001
 * National Semiconductor Corporation.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without 
 * modification, are permitted provided that the following conditions 
 * are met: 
 *
 *   * Redistributions of source code must retain the above copyright 
 *     notice, this list of conditions and the following disclaimer. 
 *
 *   * Redistributions in binary form must reproduce the above 
 *     copyright notice, this list of conditions and the following 
 *     disclaimer in the documentation and/or other materials provided 
 *     with the distribution. 
 *
 *   * Neither the name of the National Semiconductor Corporation nor 
 *     the names of its contributors may be used to endorse or promote 
 *     products derived from this software without specific prior 
 *     written permission. 
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
 * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
 * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
 * OF SUCH DAMAGE.
 *
 * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
 * YOUR JURISDICTION. It is licensee's responsibility to comply with 
 * any export regulations applicable in licensee's jurisdiction. Under 
 * CURRENT (2001) U.S. export regulations this software 
 * is eligible for export from the U.S. and can be downloaded by or 
 * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
 * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
 * Syria, Sudan, Afghanistan and any other country to which the U.S. 
 * has embargoed goods and services. 
 *
 * END_NSC_LIC_BSD */

/* NSC_LIC_GPL
 *
 * National Semiconductor Corporation Gnu General Public License for Durango
 *
 * (GPL License with Export Notice)
 *
 * Copyright (c) 1999-2001
 * National Semiconductor Corporation.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without 
 * modification, are permitted under the terms of the GNU General 
 * Public License as published by the Free Software Foundation; either 
 * version 2 of the License, or (at your option) any later version  
 *
 * In addition to the terms of the GNU General Public License, neither 
 * the name of the National Semiconductor Corporation nor the names of 
 * its contributors may be used to endorse or promote products derived 
 * from this software without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
 * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
 * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
 * OF SUCH DAMAGE. See the GNU General Public License for more details. 
 *
 * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
 * YOUR JURISDICTION. It is licensee's responsibility to comply with 
 * any export regulations applicable in licensee's jurisdiction. Under 
 * CURRENT (2001) U.S. export regulations this software 
 * is eligible for export from the U.S. and can be downloaded by or 
 * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
 * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
 * Syria, Sudan, Afghanistan and any other country to which the U.S. 
 * has embargoed goods and services. 
 *
 * You should have received a copy of the GNU General Public License 
 * along with this file; if not, write to the Free Software Foundation, 
 * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
 *
 * END_NSC_LIC_GPL */

/* SUPER IO DEFINITIONS */

#define INDEX_1					0x15C	/* base address 1 selected */
#define DATA_1					0x15D
#define INDEX_2					0x2E	/* base address 2 selected */
#define DATA_2					0x2F
#define PCI_INDEX				0xCF8	/* PCI configuration space INDEX */
#define PCI_DATA				0xCFC	/* PCI configuration space DATA  */
#define BASE_ADR_MSB_REG		0x60	/* base address MSB register */
#define BASE_ADR_LSB_REG		0x61	/* base address LSB register */

#define SIO_BASE_ADR_15C_15D	0x6000000
#define SIO_BASE_ADR_2E_2F 		0x4000000

/* SUPER IO GLOBALS */

unsigned short index_reg, data_reg;

/* ACCESS BUS DEFINITIONS */

#define ACC_I2C_TIMEOUT 1000000		/* Number of reads before timing out */
#define ACB1_BASE 	    0x810	/* ACCESS.bus base addresses         */
#define ACB2_BASE 	    0x820
#define ACBSDA			0	/* ACB serial data                   */
#define ACBST			1	/* ACB status                        */
#define ACBCST			2	/* ACB control status                */
#define ACBCTL1			3	/* ACB control 1                     */
#define ACBADDR			4	/* ACB own address                   */
#define ACBCTL2		    5		/* ACB control 2                     */
#define LDN				0x7	/* Logical Device Numbers            */
#define ACB1_LDN		0x5
#define ACB2_LDN		0x6

/* INITIAL ACCESS.bus BASE ADDRESS VALUES */

unsigned short base_address_array[3] = { 0, ACB1_BASE, ACB2_BASE };
char Freq = 0x71;

/* LOCAL ACCESS.bus FUNCTION DECLARATIONS */

void acc_i2c_start(unsigned char busnum);
void acc_i2c_stop(unsigned char busnum);
void acc_i2c_abort_data(unsigned char busnum);
void acc_i2c_bus_recovery(unsigned char busnum);
void acc_i2c_stall_after_start(unsigned char busnum, int state);
void acc_i2c_send_address(unsigned char busnum, unsigned char cData);
int acc_i2c_ack(unsigned char busnum, int fPut, int negAck);
void acc_i2c_stop_clock(unsigned char busnum);
void acc_i2c_activate_clock(unsigned char busnum);
void acc_i2c_write_byte(unsigned char busnum, unsigned char cData);
unsigned char acc_i2c_read_byte(unsigned char busnum, int last_byte);
void acc_i2c_reset_bus(unsigned char busnum);
int acc_i2c_request_master(unsigned char busnum);
void acc_i2c_config(unsigned char busnum, short adr, char freq);
char acc_i2c_set_freq(unsigned char busnum, char freq);
unsigned short acc_i2c_set_base_address(unsigned char busnum, short adr);

/* LOCAL HELPER ROUTINES */

void OsPciReadDWord(int bus, int dev, int func, int address,
		    unsigned long *data);
int sio_set_index_data_reg(void);
void sio_write_reg(unsigned char reg, unsigned char data);
unsigned char sio_read_reg(unsigned char reg);

int acc_i2c_reset(unsigned char busnum, short adr, char freq);
int acc_i2c_write(unsigned char busnum, unsigned char chipadr,
		  unsigned char subadr, unsigned char bytes,
		  unsigned char *data);
int acc_i2c_read(unsigned char busnum, unsigned char chipadr,
		 unsigned char subadr, unsigned char bytes,
		 unsigned char *data);
int acc_i2c_select_gpio(int clock, int data);
int acc_i2c_init(void);
void acc_i2c_cleanup(void);

/*---------------------------------------------------------------------------
 * OsPciReadDWord
 *
 * This routine reads one double word from the PCI configuration header
 * defined by 'bus', 'dev', 'func' and 'address' to the double word
 * pointed to by 'data'.
 *
 * Returns : None.
 *---------------------------------------------------------------------------
 */
void
OsPciReadDWord(int bus, int dev, int func, int address, unsigned long *data)
{
   /*
    * The address of a double word in the Configuration Header is built in
    * the following way :
    * {10000000,bus[23:16],device[15:11],function[10:8],address[7:2],00}
    */
   long addr = (0x80000000 |
		((bus & 0xff) << 16) |
		((dev & 0x1f) << 11) |
		((func & 0x7) << 8) | (address & 0xff));
   OUTD(PCI_INDEX, addr);
   *data = IND(PCI_DATA);
}

/*---------------------------------------------------------------------------
 *	sio_set_index_data_reg
 *
 *	This routine checks which index and data registers to use
 *  in order to access the Super I/O registers
 *
 *	Returns : 1 - OK
 *            0 - Super I/O disabled or configuration access disabled
 *
 *---------------------------------------------------------------------------
 */
int
sio_set_index_data_reg(void)
{
   unsigned long xbus_expention_bar, io_control_reg1;

   OsPciReadDWord(0, 0x12, 5, 0x10, &xbus_expention_bar);
   xbus_expention_bar = xbus_expention_bar & 0xfffffffe;
   io_control_reg1 = IND((unsigned short)xbus_expention_bar);

   if ((io_control_reg1) & (SIO_BASE_ADR_15C_15D)) {
      index_reg = INDEX_1;
      data_reg = DATA_1;
      return (1);
   }

   if ((io_control_reg1) & (SIO_BASE_ADR_2E_2F)) {
      index_reg = INDEX_2;
      data_reg = DATA_2;
      return (1);
   }

   return (0);
}

/*---------------------------------------------------------------------------
 *	sio_write_reg
 *
 *	This routine writes 'data' to 'reg' Super I/O register
 *
 *	Returns : None
 *---------------------------------------------------------------------------
 */
void
sio_write_reg(unsigned char reg, unsigned char data)
{
   OUTB(index_reg, reg);
   OUTB(data_reg, data);
}

/*---------------------------------------------------------------------------
 *	sio_read_reg
 *
 *	This routine reads data from 'reg' Super I/O register
 *
 *	Returns : The data read from the requested register
 *---------------------------------------------------------------------------
 */
unsigned char
sio_read_reg(unsigned char reg)
{
   OUTB(index_reg, reg);
   return INB(data_reg);
}

/*---------------------------------------------------------------------------
 *	gfx_i2c_reset
 *
 *	This routine resets the I2C bus as follows :
 *	· Sets the base address of the ACCESS.bus
 *	· Sets the frequency of the ACCESS.bus
 *	· Resets the ACCESS.bus
 *
 * 	If 'adr'  is -1 the address is read from the hardware.
 *	If 'freq' is -1 the frequency is set to 56 clock cycles.
 *---------------------------------------------------------------------------
 */
#if GFX_I2C_DYNAMIC
int
acc_i2c_reset(unsigned char busnum, short adr, char freq)
#else
int
gfx_i2c_reset(unsigned char busnum, short adr, char freq)
#endif
{
   if ((busnum != 1) && (busnum != 2))
      return GFX_STATUS_BAD_PARAMETER;
   acc_i2c_config(busnum, adr, freq);
   if (base_address_array[busnum] == 0)
      return GFX_STATUS_ERROR;
   acc_i2c_reset_bus(busnum);
   return GFX_STATUS_OK;
}

/*---------------------------------------------------------------------------
 * gfx_i2c_select_gpio
 *
 * This routine selects which GPIO pins to use.
 *---------------------------------------------------------------------------
 */
#if GFX_I2C_DYNAMIC
int
acc_i2c_select_gpio(int clock, int data)
#else
int
gfx_i2c_select_gpio(int clock, int data)
#endif
{
   /* THIS ROUTINE DOES NOT APPLY TO THE ACCESS.bus IMPLEMENTATION. */

   return (GFX_STATUS_OK);
}

/*---------------------------------------------------------------------------
 *	gfx_i2c_write
 *
 *	This routine writes data to the specified I2C address.
 *  busnum - ACCESS.bus number (1 or 2).
 *---------------------------------------------------------------------------
 */
#if GFX_I2C_DYNAMIC
int
acc_i2c_write(unsigned char busnum, unsigned char chipadr,
	      unsigned char subadr, unsigned char bytes, unsigned char *data)
#else
int
gfx_i2c_write(unsigned char busnum, unsigned char chipadr,
	      unsigned char subadr, unsigned char bytes, unsigned char *data)
#endif
{
   int loop = 0;

   if ((busnum != 1) && (busnum != 2))
      return GFX_STATUS_BAD_PARAMETER;

   /* REQUEST MASTER */

   if (!acc_i2c_request_master(busnum))
      return (GFX_STATUS_ERROR);

   /* WRITE ADDRESS COMMAND */

   acc_i2c_ack(busnum, 1, 0);
   acc_i2c_stall_after_start(busnum, 1);
   acc_i2c_send_address(busnum, (unsigned char)(chipadr & 0xFE));
   acc_i2c_stall_after_start(busnum, 0);
   if (!acc_i2c_ack(busnum, 0, 0))
      return (GFX_STATUS_ERROR);

   /* WRITE COMMAND */

   acc_i2c_write_byte(busnum, subadr);
   if (!acc_i2c_ack(busnum, 0, 0))
      return (GFX_STATUS_ERROR);

   /* WRITE DATA */

   for (loop = 0; loop < bytes; loop++) {
      acc_i2c_write_byte(busnum, *data);
      if (loop < (bytes - 1))
	 data += sizeof(unsigned char);
      if (!acc_i2c_ack(busnum, 0, 0))
	 return (GFX_STATUS_ERROR);
   }
   data -= (bytes - 1);
   acc_i2c_stop(busnum);

   return GFX_STATUS_OK;
}

/*---------------------------------------------------------------------------
 *	gfx_i2c_read
 *
 *	This routine reads data from the specified I2C address.
 *  busnum - ACCESS.bus number (1 or 2).
 *---------------------------------------------------------------------------
 */
#if GFX_I2C_DYNAMIC
int
acc_i2c_read(unsigned char busnum, unsigned char chipadr,
	     unsigned char subadr, unsigned char bytes, unsigned char *data)
#else
int
gfx_i2c_read(unsigned char busnum, unsigned char chipadr,
	     unsigned char subadr, unsigned char bytes, unsigned char *data)
#endif
{
   unsigned char bytesRead;

   if ((busnum != 1) && (busnum != 2))
      return GFX_STATUS_BAD_PARAMETER;

   if (bytes == 0)
      return GFX_STATUS_OK;

   /* REQUEST MASTER */

   if (!acc_i2c_request_master(busnum))
      return (GFX_STATUS_ERROR);

   /* WRITE ADDRESS COMMAND */

   acc_i2c_ack(busnum, 1, 0);
   acc_i2c_stall_after_start(busnum, 1);
   acc_i2c_send_address(busnum, (unsigned char)(chipadr & 0xFE));
   acc_i2c_stall_after_start(busnum, 0);
   if (!acc_i2c_ack(busnum, 0, 0))
      return (GFX_STATUS_ERROR);

   /* WRITE COMMAND */

   acc_i2c_write_byte(busnum, subadr);
   if (!acc_i2c_ack(busnum, 0, 0))
      return (GFX_STATUS_ERROR);

   /* START THE READ */

   acc_i2c_start(busnum);

   /* WRITE ADDRESS COMMAND */

   acc_i2c_ack(busnum, 1, 1);
   acc_i2c_stall_after_start(busnum, 1);
   acc_i2c_send_address(busnum, (unsigned char)(chipadr | 0x01));

   /* IF LAST BYTE */

   if (bytes == 1)
      acc_i2c_ack(busnum, 1, 1);
   else
      acc_i2c_ack(busnum, 1, 0);

   acc_i2c_stall_after_start(busnum, 0);

   if (!acc_i2c_ack(busnum, 0, 0))
      return (GFX_STATUS_ERROR);

   /* READ COMMAND */

   for (bytesRead = 0; bytesRead < bytes; bytesRead += 1) {
      if (bytesRead < (bytes - 2)) {
	 data[bytesRead] = acc_i2c_read_byte(busnum, 0);
	 acc_i2c_ack(busnum, 1, 0);
      } else if (bytesRead == (bytes - 2)) {	/* TWO BYTES LEFT */
	 acc_i2c_ack(busnum, 1, 1);
	 data[bytesRead] = acc_i2c_read_byte(busnum, 0);
	 acc_i2c_ack(busnum, 1, 1);
      } else {				/* LAST BYTE */

	 data[bytesRead] = acc_i2c_read_byte(busnum, 1);
	 acc_i2c_stop(busnum);
      }

      /* WHILE NOT LAST BYTE */

      if ((!(bytesRead == (bytes - 1))) && (!acc_i2c_ack(busnum, 0, 0)))
	 return (bytesRead);
   }

   return GFX_STATUS_OK;
}

/*---------------------------------------------------------------------------
 * gfx_i2c_init
 *
 * This routine initializes the use of the ACCESS.BUS.
 *---------------------------------------------------------------------------
 */
#if GFX_I2C_DYNAMIC
int
acc_i2c_init(void)
#else
int
gfx_i2c_init(void)
#endif
{
   /* ### ADD ### THIS ROUTINE IS NOT YET IMPLEMENTED FOR ACCESS.bus */
   return (GFX_STATUS_OK);
}

/*---------------------------------------------------------------------------
 * gfx_i2c_cleanup
 *
 * This routine ends the use of the ACCESS.BUS.
 *---------------------------------------------------------------------------
 */
#if GFX_I2C_DYNAMIC
void
acc_i2c_cleanup(void)
#else
void
gfx_i2c_cleanup(void)
#endif
{
   /* ### ADD ### THIS ROUTINE IS NOT YET IMPLEMENTED FOR ACCESS.bus */
}

/*--------------------------------------------------------*/
/*  LOCAL ROUTINES SPECIFIC TO ACCESS.bus IMPLEMENTATION  */
/*--------------------------------------------------------*/

/*---------------------------------------------------------------------------
 * acc_i2c_reset_bus
 *
 * This routine resets the I2C bus.
 *---------------------------------------------------------------------------
 */
void
acc_i2c_reset_bus(unsigned char busnum)
{
   unsigned char reg;
   unsigned short bus_base_address = base_address_array[busnum];

   /* Disable the ACCESS.bus device and */
   /* Configure the SCL frequency */
   OUTB((unsigned short)(bus_base_address + ACBCTL2),
	(unsigned char)(Freq & 0xFE));

   /* Configure no interrupt mode (polling) and */
   /* Disable global call address */
   OUTB((unsigned short)(bus_base_address + ACBCTL1), 0x0);

   /* Disable slave address */
   OUTB((unsigned short)(bus_base_address + ACBADDR), 0x0);

   /* Enable the ACCESS.bus device */
   reg = INB((unsigned short)(bus_base_address + ACBCTL2));
   reg |= 0x01;
   OUTB((unsigned short)(bus_base_address + ACBCTL2), reg);

   /* Issue STOP event */

   acc_i2c_stop(busnum);

   /* Clear NEGACK, STASTR and BER bits */
   OUTB((unsigned short)(bus_base_address + ACBST), 0x38);

   /* Clear BB (BUS BUSY) bit */
   reg = INB((unsigned short)(bus_base_address + ACBCST));
   reg |= 0x02;
   OUTB((unsigned short)(bus_base_address + ACBCST), reg);
}

/*---------------------------------------------------------------------------
 * acc_i2c_start
 *
 * This routine starts a transfer on the I2C bus.
 *---------------------------------------------------------------------------
 */
void
acc_i2c_start(unsigned char busnum)
{
   unsigned char reg;
   unsigned short bus_base_address = base_address_array[busnum];

   reg = INB((unsigned short)(bus_base_address + ACBCTL1));
   reg |= 0x01;
   OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
}

/*---------------------------------------------------------------------------
 * acc_i2c_stop
 *
 * This routine stops a transfer on the I2C bus.
 *---------------------------------------------------------------------------
 */
void
acc_i2c_stop(unsigned char busnum)
{
   unsigned char reg;
   unsigned short bus_base_address = base_address_array[busnum];

   reg = INB((unsigned short)(bus_base_address + ACBCTL1));
   reg |= 0x02;
   OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
}

/*---------------------------------------------------------------------------
 * acc_i2c_abort_data
 *---------------------------------------------------------------------------
 */
void
acc_i2c_abort_data(unsigned char busnum)
{
   unsigned char reg;
   unsigned short bus_base_address = base_address_array[busnum];

   acc_i2c_stop(busnum);
   reg = INB((unsigned short)(bus_base_address + ACBCTL1));
   reg |= 0x10;
   OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
}

/*---------------------------------------------------------------------------
 * acc_i2c_bus_recovery
 *---------------------------------------------------------------------------
 */
void
acc_i2c_bus_recovery(unsigned char busnum)
{
   acc_i2c_abort_data(busnum);
   acc_i2c_reset_bus(busnum);
}

/*---------------------------------------------------------------------------
 * acc_i2c_stall_after_start
 *---------------------------------------------------------------------------
 */
void
acc_i2c_stall_after_start(unsigned char busnum, int state)
{
   unsigned char reg;
   unsigned short bus_base_address = base_address_array[busnum];

   reg = INB((unsigned short)(bus_base_address + ACBCTL1));
   if (state)
      reg |= 0x80;
   else
      reg &= 0x7F;
   OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);

   if (!state) {
      reg = INB((unsigned short)(bus_base_address + ACBST));
      reg |= 0x08;
      OUTB((unsigned short)(bus_base_address + ACBST), reg);
   }
}

/*---------------------------------------------------------------------------
 * acc_i2c_send_address
 *---------------------------------------------------------------------------
 */
void
acc_i2c_send_address(unsigned char busnum, unsigned char cData)
{
   unsigned char reg;
   unsigned short bus_base_address = base_address_array[busnum];
   unsigned long timeout = 0;

   /* WRITE THE DATA */

   OUTB((unsigned short)(bus_base_address + ACBSDA), cData);
   while (1) {
      reg = INB((unsigned short)(bus_base_address + ACBST));
      if ((reg & 0x38) != 0)		/* check STASTR, BER and NEGACK */
	 break;
      if (timeout++ == ACC_I2C_TIMEOUT) {
	 acc_i2c_bus_recovery(busnum);
	 return;
      }
   }

   /* CHECK FOR BUS ERROR */

   if (reg & 0x20) {
      acc_i2c_bus_recovery(busnum);
      return;
   }

   /* CHECK NEGATIVE ACKNOWLEDGE */

   if (reg & 0x10) {
      acc_i2c_abort_data(busnum);
      return;
   }

}

/*---------------------------------------------------------------------------
 * acc_i2c_ack
 *
 * This routine looks for acknowledge on the I2C bus.
 *---------------------------------------------------------------------------
 */
int
acc_i2c_ack(unsigned char busnum, int fPut, int negAck)
{
   unsigned char reg;
   unsigned short bus_base_address = base_address_array[busnum];
   unsigned long timeout = 0;

   if (fPut) {				/* read operation */
      if (!negAck) {
	 /* Push Ack onto I2C bus */
	 reg = INB((unsigned short)(bus_base_address + ACBCTL1));
	 reg &= 0xE7;
	 OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
      } else {
	 /* Push negAck onto I2C bus */
	 reg = INB((unsigned short)(bus_base_address + ACBCTL1));
	 reg |= 0x10;
	 OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
      }
   } else {				/* write operation */
      /* Receive Ack from I2C bus */
      while (1) {
	 reg = INB((unsigned short)(bus_base_address + ACBST));
	 if ((reg & 0x70) != 0)		/* check SDAST, BER and NEGACK */
	    break;
	 if (timeout++ == ACC_I2C_TIMEOUT) {
	    acc_i2c_bus_recovery(busnum);
	    return (0);
	 }
      }

      /* CHECK FOR BUS ERROR */

      if (reg & 0x20) {
	 acc_i2c_bus_recovery(busnum);
	 return (0);
      }

      /* CHECK NEGATIVE ACKNOWLEDGE */

      if (reg & 0x10) {
	 acc_i2c_abort_data(busnum);
	 return (0);
      }
   }
   return (1);
}

/*---------------------------------------------------------------------------
 * acc_i2c_stop_clock
 *
 * This routine stops the ACCESS.bus clock.
 *---------------------------------------------------------------------------
 */
void
acc_i2c_stop_clock(unsigned char busnum)
{
   unsigned char reg;
   unsigned short bus_base_address = base_address_array[busnum];

   reg = INB((unsigned short)(bus_base_address + ACBCTL2));
   reg &= ~0x01;
   OUTB((unsigned short)(bus_base_address + ACBCTL2), reg);
}

/*---------------------------------------------------------------------------
 * acc_i2c_activate_clock
 *
 * This routine activates the ACCESS.bus clock.
 *---------------------------------------------------------------------------
 */
void
acc_i2c_activate_clock(unsigned char busnum)
{
   unsigned char reg;
   unsigned short bus_base_address = base_address_array[busnum];

   reg = INB((unsigned short)(bus_base_address + ACBCTL2));
   reg |= 0x01;
   OUTB((unsigned short)(bus_base_address + ACBCTL2), reg);
}

/*---------------------------------------------------------------------------
 * acc_i2c_write_byte
 *
 * This routine writes a byte to the I2C bus
 *---------------------------------------------------------------------------
 */
void
acc_i2c_write_byte(unsigned char busnum, unsigned char cData)
{
   unsigned char reg;
   unsigned short bus_base_address = base_address_array[busnum];
   unsigned long timeout = 0;

   while (1) {
      reg = INB((unsigned short)(bus_base_address + ACBST));
      if (reg & 0x70)
	 break;
      if (timeout++ == ACC_I2C_TIMEOUT) {
	 acc_i2c_bus_recovery(busnum);
	 return;
      }
   }

   /* CHECK FOR BUS ERROR */

   if (reg & 0x20) {
      acc_i2c_bus_recovery(busnum);
      return;
   }

   /* CHECK NEGATIVE ACKNOWLEDGE */

   if (reg & 0x10) {
      acc_i2c_abort_data(busnum);
      return;
   }

   /* WRITE THE DATA */

   OUTB((unsigned short)(bus_base_address + ACBSDA), cData);
}

/*---------------------------------------------------------------------------
 * acc_i2c_read_byte
 *
 * This routine reads a byte from the I2C bus
 *---------------------------------------------------------------------------
 */
unsigned char
acc_i2c_read_byte(unsigned char busnum, int last_byte)
{
   unsigned char cData, reg;
   unsigned short bus_base_address = base_address_array[busnum];
   unsigned long timeout = 0;

   while (1) {
      reg = INB((unsigned short)(bus_base_address + ACBST));
      if (reg & 0x60)
	 break;
      if (timeout++ == ACC_I2C_TIMEOUT) {
	 acc_i2c_bus_recovery(busnum);
	 return (0xEF);
      }
   }

   /* CHECK FOR BUS ERROR */

   if (reg & 0x20) {
      acc_i2c_bus_recovery(busnum);
      return (0xEE);
   }

   /* READ DATA */
   if (last_byte)
      acc_i2c_stop_clock(busnum);
   cData = INB((unsigned short)(bus_base_address + ACBSDA));
   if (last_byte)
      acc_i2c_activate_clock(busnum);

   return (cData);
}

/*---------------------------------------------------------------------------
 * acc_i2c_request_master
 *---------------------------------------------------------------------------
 */
int
acc_i2c_request_master(unsigned char busnum)
{
   unsigned char reg;
   unsigned short bus_base_address = base_address_array[busnum];
   unsigned long timeout = 0;

   acc_i2c_start(busnum);
   while (1) {
      reg = INB((unsigned short)(bus_base_address + ACBST));
      if (reg & 0x60)
	 break;
      if (timeout++ == ACC_I2C_TIMEOUT) {
	 acc_i2c_bus_recovery(busnum);
	 return (0);
      }
   }

   /* CHECK FOR BUS ERROR */

   if (reg & 0x20) {
      acc_i2c_abort_data(busnum);
      return (0);
   }

   /* CHECK NEGATIVE ACKNOWLEDGE */

   if (reg & 0x10) {
      acc_i2c_abort_data(busnum);
      return (0);
   }
   return (1);
}

/*--------------------------------------------------------*/
/*  LOCAL ROUTINES SPECIFIC TO ACCESS.bus INITIALIZATION  */
/*--------------------------------------------------------*/

/*----------------------------------------------------------------------------
 * acc_i2c_config
 *
 * This routine configures the I2C bus
 *----------------------------------------------------------------------------
 */
void
acc_i2c_config(unsigned char busnum, short adr, char freq)
{
   base_address_array[busnum] = acc_i2c_set_base_address(busnum, adr);
   Freq = acc_i2c_set_freq(busnum, freq);
}

/*----------------------------------------------------------------------------
 * acc_i2c_set_freq
 *
 * This routine sets the frequency of the I2C bus
 *----------------------------------------------------------------------------
 */
char
acc_i2c_set_freq(unsigned char busnum, char freq)
{
   unsigned short bus_base_address = base_address_array[busnum];

   OUTB((unsigned short)(bus_base_address + ACBCTL2), 0x0);

   if (freq == (char)(-1))
      freq = 0x71;
   else {
      freq = freq << 1;
      freq |= 0x01;
   }

   OUTB((unsigned short)(bus_base_address + ACBCTL2), freq);
   return (freq);
}

/*---------------------------------------------------------------------------
 * acc_i2c_set_base_address
 *
 * This routine sets the base address of the I2C bus
 *---------------------------------------------------------------------------
 */
unsigned short
acc_i2c_set_base_address(unsigned char busnum, short adr)
{
   unsigned short ab_base_addr;

   /* Get Super I/O Index and Data registers */
   if (!sio_set_index_data_reg())
      return (0);

   /* Configure LDN to current ACB */
   if (busnum == 1)
      sio_write_reg(LDN, ACB1_LDN);
   if (busnum == 2)
      sio_write_reg(LDN, ACB2_LDN);

   if (adr == -1) {
      /* Get ACCESS.bus base address */
      ab_base_addr = sio_read_reg(BASE_ADR_MSB_REG);
      ab_base_addr = ab_base_addr << 8;
      ab_base_addr |= sio_read_reg(BASE_ADR_LSB_REG);
      if (ab_base_addr != 0)
	 return ab_base_addr;
      else
	 adr = (busnum == 1 ? ACB1_BASE : ACB2_BASE);
   }

   /* Set ACCESS.bus base address */
   sio_write_reg(BASE_ADR_LSB_REG, (unsigned char)(adr & 0xFF));
   sio_write_reg(BASE_ADR_MSB_REG, (unsigned char)(adr >> 8));

   return adr;
}

/* END OF FILE */