diff options
| author | Thierry Reding <treding@nvidia.com> | 2014-04-04 11:27:11 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2014-08-07 16:55:26 +0200 |
| commit | 70d4a0dcddc61b4da41ced9c770933e804f435f9 (patch) | |
| tree | 4fcc6687cd8e168baae80761271c49c4c50f40d2 | |
| parent | 763bd11b73c72e5a9a4019aec19417a4f97999e2 (diff) | |
WIP: clk: tegra: Enable spread-spectrum for PLLE
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | drivers/clk/tegra/clk-pll.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index c7c6d8fb32fb..cc0e3be52a95 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -779,6 +779,12 @@ static int clk_plle_enable(struct clk_hw *hw) clk_pll_wait_for_lock(pll); + /* enable spread-spectrum */ + val = readl(pll->clk_base + PLLE_SS_CTRL); + val &= ~PLLE_SS_DISABLE; + val |= (0x18 << 24) | (0x01 << 16) | (0x24 << 0); + writel(val, pll->clk_base + PLLE_SS_CTRL); + return 0; } |