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authorAlexandre Courbot <acourbot@nvidia.com>2014-07-08 21:32:11 +0900
committerThierry Reding <treding@nvidia.com>2014-07-14 10:22:26 +0200
commit884d6a0b558c9c31fdf0d950bd07a2c804876445 (patch)
treeb45eab58e88b29aa7057073739e3819c74cc97e8
parent7171511eaec5bf23fb06078f59784a3a0626b38f (diff)
drm/dsi: Flag for non-continuous clock behaviordrm/core/mipi-dsi-non-continuous
As per section 5.6.1 of the DSI specification, all DSI transmitters must support continuous clock behavior on the clock lane, while non-continuous mode support is only optional. Add a flag that allows devices to indicate that they support non-continuous clock mode so host drivers can adapt their behavior accordingly. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r--include/drm/drm_mipi_dsi.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 944f33f8ba38..efa1b552adc5 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -94,6 +94,8 @@ void mipi_dsi_host_unregister(struct mipi_dsi_host *host);
#define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8)
/* disable EoT packets in HS mode */
#define MIPI_DSI_MODE_EOT_PACKET BIT(9)
+/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
+#define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10)
enum mipi_dsi_pixel_format {
MIPI_DSI_FMT_RGB888,