From 856572319fadeeadf58d782ab6f3f2d230822d67 Mon Sep 17 00:00:00 2001 From: Ilia Mirkin Date: Sat, 12 Oct 2019 16:00:15 -0400 Subject: nv4/exa: tiling is unsupported pre-nv10, reduce alignment requirements MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 8c8f15c9d3 added increased pitch alignment requirements to handle nv10-nv40 tiling (which must have a small number * PoT pitch). While NV4/NV5 do have tiling, this was never supported in nouveau. This change enables 1920x1200 resolutions since the maximum surface pitch has to be strictly less than 8192. The current logic will align 1920*4 up to 8192 unnecessarily. Signed-off-by: Ilia Mirkin Cc: Marcin Kościelnicki Cc: Francisco Jerez --- src/nouveau_dri2.c | 5 ++++- src/nv_driver.c | 3 ++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/src/nouveau_dri2.c b/src/nouveau_dri2.c index 3d53785..ce0a573 100644 --- a/src/nouveau_dri2.c +++ b/src/nouveau_dri2.c @@ -62,7 +62,10 @@ nouveau_dri2_create_buffer2(ScreenPtr pScreen, DrawablePtr pDraw, unsigned int a ppix->refcnt++; } else { int bpp; - unsigned int usage_hint = NOUVEAU_CREATE_PIXMAP_TILED; + unsigned int usage_hint = 0; + + if (pNv->Architecture >= NV_ARCH_10) + usage_hint |= NOUVEAU_CREATE_PIXMAP_TILED; /* 'format' is just depth (or 0, or maybe it depends on the caller) */ bpp = round_up_pow2(format ? format : pDraw->depth); diff --git a/src/nv_driver.c b/src/nv_driver.c index 42eb9db..a63674c 100644 --- a/src/nv_driver.c +++ b/src/nv_driver.c @@ -1082,7 +1082,8 @@ NVPreInit(ScrnInfoPtr pScrn, int flags) pNv->wfb_enabled = xf86ReturnOptValBool( pNv->Options, OPTION_WFB, FALSE); - pNv->tiled_scanout = TRUE; + if (pNv->Architecture >= NV_ARCH_10) + pNv->tiled_scanout = TRUE; } pNv->ce_enabled = -- cgit v1.2.3