diff options
| author | Stuart Bennett <sb476@cam.ac.uk> | 2008-10-23 02:46:03 +0100 |
|---|---|---|
| committer | Stuart Bennett <sb476@cam.ac.uk> | 2008-10-24 01:28:13 +0100 |
| commit | 1c7bee95610a47175064b17afd6aa2a45e311b1a (patch) | |
| tree | cdf3cb1450e06f8ead90b0d6bbf3510288213691 | |
| parent | cf5162b5ed99666d3dc8db8328115afd6fff6a8e (diff) | |
Robust nv11 head setting (from mmiotrace)
| -rw-r--r-- | src/nv_driver.c | 2 | ||||
| -rw-r--r-- | src/nv_hw.c | 14 | ||||
| -rw-r--r-- | src/nv_proto.h | 2 | ||||
| -rw-r--r-- | src/nvreg.h | 1 |
4 files changed, 15 insertions, 4 deletions
diff --git a/src/nv_driver.c b/src/nv_driver.c index 758b745..4a563c7 100644 --- a/src/nv_driver.c +++ b/src/nv_driver.c @@ -1793,7 +1793,7 @@ NVRestore(ScrnInfoPtr pScrn) NVSetOwner(pNv, 0); /* move to head A to set owner */ NVLockVgaCrtc(pNv, 0, false); xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Restoring CRTC_OWNER to %d.\n", pNv->vtOWNER); - NVWriteVgaCrtc(pNv, 0, NV_CIO_CRE_44, pNv->vtOWNER); + NVSetOwner(pNv, pNv->vtOWNER); NVLockVgaCrtc(pNv, 0, true); } } diff --git a/src/nv_hw.c b/src/nv_hw.c index 50bd481..5318c61 100644 --- a/src/nv_hw.c +++ b/src/nv_hw.c @@ -238,10 +238,20 @@ void NVVgaProtect(NVPtr pNv, int head, bool protect) NVSetEnablePalette(pNv, head, protect); } -void NVSetOwner(NVPtr pNv, int head) +/* owner parameter is slightly abused: + * 0 and 1 are treated as head values and so the set value is (owner * 3) + * other values are treated as literal values to set + */ +void NVSetOwner(NVPtr pNv, int owner) { + if (owner == 1) + owner *= 3; /* CR44 is always changed on CRTC0 */ - NVWriteVgaCrtc(pNv, 0, NV_CIO_CRE_44, head * 0x3); + NVWriteVgaCrtc(pNv, 0, NV_CIO_CRE_44, owner); + if (pNv->NVArch == 0x11) { /* set me harder */ + NVWriteVgaCrtc(pNv, 0, NV_CIO_CRE_2E, owner); + NVWriteVgaCrtc(pNv, 0, NV_CIO_CRE_2E, owner); + } } void NVLockVgaCrtc(NVPtr pNv, int head, bool lock) diff --git a/src/nv_proto.h b/src/nv_proto.h index a58a352..3c5c9e1 100644 --- a/src/nv_proto.h +++ b/src/nv_proto.h @@ -113,7 +113,7 @@ void NVWriteVgaAttr(NVPtr pNv, int head, uint8_t index, uint8_t value); uint8_t NVReadVgaAttr(NVPtr pNv, int head, uint8_t index); void NVVgaSeqReset(NVPtr pNv, int head, bool start); void NVVgaProtect(NVPtr pNv, int head, bool protect); -void NVSetOwner(NVPtr pNv, int head); +void NVSetOwner(NVPtr pNv, int owner); void NVLockVgaCrtc(NVPtr pNv, int head, bool lock); void NVBlankScreen(NVPtr pNv, int head, bool blank); void nv_fix_nv40_hw_cursor(NVPtr pNv, int head); diff --git a/src/nvreg.h b/src/nvreg.h index dda804a..f41bc55 100644 --- a/src/nvreg.h +++ b/src/nvreg.h @@ -240,6 +240,7 @@ #define NV_CIO_CRE_CHIP_ID_INDEX 0x27 /* chip revision */ #define NV_CIO_CRE_PIXEL_INDEX 0x28 #define NV_CIO_CRE_HEB__INDEX 0x2d /* horizontal extra bits? */ + #define NV_CIO_CRE_2E 0x2e /* some scratch or dummy reg to force writes to sink in */ #define NV_CIO_CRE_HCUR_ADDR2_INDEX 0x2f /* cursor */ #define NV_CIO_CRE_HCUR_ADDR0_INDEX 0x30 /* pixmap */ #define NV_CIO_CRE_HCUR_ASI 0x80 |