ac: Annotate context rolls

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27549>

4 files changed, 20 insertions, 7 deletions

diff --git a/src/amd/common/ac_debug.h b/src/amd/common/ac_debug.h
index 3dd215095da..2f0039f1fde 100644
--- a/src/amd/common/ac_debug.h
+++ b/src/amd/common/ac_debug.h
@@ -63,8 +63,9 @@ void ac_print_gpuvm_fault_status(FILE *output, enum amd_gfx_level gfx_level,
                                  uint32_t status);
 
 /* ac_gather_context_rolls.c */
+struct hash_table;
 void ac_gather_context_rolls(FILE *f, uint32_t **ibs, uint32_t *ib_dw_sizes, unsigned num_ibs,
-                             const struct radeon_info *info);
+                             struct hash_table *annotations, const struct radeon_info *info);
 
 /* ac_parse_ib.c */
 void ac_dump_reg(FILE *file, enum amd_gfx_level gfx_level, enum radeon_family family,
diff --git a/src/amd/common/ac_gather_context_rolls.c b/src/amd/common/ac_gather_context_rolls.c
index 7bb8575b3f0..5da636b297c 100644
--- a/src/amd/common/ac_gather_context_rolls.c
+++ b/src/amd/common/ac_gather_context_rolls.c
@@ -22,6 +22,7 @@
 #include "sid_tables.h"
 
 #include "util/bitset.h"
+#include "util/hash_table.h"
 #include "util/u_dynarray.h"
 #include "util/u_memory.h"
 
@@ -34,6 +35,7 @@ struct ac_context_reg_deltas {
 struct ac_context_reg_state {
    uint32_t regs[1024];
    struct ac_context_reg_deltas deltas;
+   const char *annotation;
 };
 
 struct ac_context_roll_ctx {
@@ -93,9 +95,16 @@ static unsigned get_reg_index(unsigned reg)
    return (reg - SI_CONTEXT_REG_OFFSET) / 4;
 }
 
-static void ac_ib_gather_context_rolls(struct ac_context_roll_ctx *ctx, uint32_t *ib, int num_dw)
+static void ac_ib_gather_context_rolls(struct ac_context_roll_ctx *ctx, uint32_t *ib, int num_dw,
+                                       struct hash_table *annotations)
 {
    for (unsigned cur_dw = 0; cur_dw < num_dw;) {
+      if (annotations) {
+         struct hash_entry *marker = _mesa_hash_table_search(annotations, ib + cur_dw);
+         if (marker)
+            ctx->cur->annotation = marker->data;
+      }
+
       uint32_t header = ib[cur_dw++];
       unsigned type = PKT_TYPE_G(header);
 
@@ -292,7 +301,7 @@ static void ac_ib_gather_context_rolls(struct ac_context_roll_ctx *ctx, uint32_t
 }
 
 void ac_gather_context_rolls(FILE *f, uint32_t **ibs, uint32_t *ib_dw_sizes, unsigned num_ibs,
-                             const struct radeon_info *info)
+                             struct hash_table *annotations, const struct radeon_info *info)
 {
    struct ac_context_roll_ctx ctx;
 
@@ -304,7 +313,7 @@ void ac_gather_context_rolls(FILE *f, uint32_t **ibs, uint32_t *ib_dw_sizes, uns
 
    /* Parse the IBs. */
    for (unsigned i = 0; i < num_ibs; i++)
-      ac_ib_gather_context_rolls(&ctx, ibs[i], ib_dw_sizes[i]);
+      ac_ib_gather_context_rolls(&ctx, ibs[i], ib_dw_sizes[i], annotations);
 
    /* Roll the last context to add it to the list. */
    ac_roll_context(&ctx);
@@ -315,6 +324,9 @@ void ac_gather_context_rolls(FILE *f, uint32_t **ibs, uint32_t *ib_dw_sizes, uns
       util_dynarray_foreach(&ctx.rolls, struct ac_context_reg_state *, iter) {
          struct ac_context_reg_state *state = *iter;
 
+         if (state->annotation)
+            fprintf(f, "%s: ", state->annotation);
+
          unsigned i;
          BITSET_FOREACH_SET(i, state->deltas.changed, 1024) {
             unsigned reg_offset = SI_CONTEXT_REG_OFFSET + i * 4;
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
index 6bc8b13bdab..93a447ee7fe 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
@@ -1411,7 +1411,7 @@ radv_amdgpu_winsys_cs_dump(struct radeon_cmdbuf *_cs, FILE *file, const int *tra
                      ws->info.gfx_level, ws->info.family, cs->hw_ip, radv_amdgpu_winsys_get_cpu_addr, cs);
       } else {
          uint32_t *ib_dw = addr_info.cpu_addr;
-         ac_gather_context_rolls(file, &ib_dw, &cs->ib_buffers[0].cdw, 1, &ws->info);
+         ac_gather_context_rolls(file, &ib_dw, &cs->ib_buffers[0].cdw, 1, NULL, &ws->info);
       }
    } else {
       uint32_t **ibs = type == RADV_CS_DUMP_TYPE_CTX_ROLLS ? malloc(cs->num_ib_buffers * sizeof(uint32_t *)) : NULL;
@@ -1443,7 +1443,7 @@ radv_amdgpu_winsys_cs_dump(struct radeon_cmdbuf *_cs, FILE *file, const int *tra
       }
 
       if (type == RADV_CS_DUMP_TYPE_CTX_ROLLS) {
-         ac_gather_context_rolls(file, ibs, ib_dw_sizes, cs->num_ib_buffers, &ws->info);
+         ac_gather_context_rolls(file, ibs, ib_dw_sizes, cs->num_ib_buffers, NULL, &ws->info);
 
          free(ibs);
          free(ib_dw_sizes);
diff --git a/src/gallium/drivers/radeonsi/si_debug.c b/src/gallium/drivers/radeonsi/si_debug.c
index a6a8c8902a2..367549bdee2 100644
--- a/src/gallium/drivers/radeonsi/si_debug.c
+++ b/src/gallium/drivers/radeonsi/si_debug.c
@@ -1095,7 +1095,7 @@ void si_gather_context_rolls(struct si_context *sctx)
    ib_dw_sizes[cs->num_prev] = cs->current.cdw;
 
    FILE *f = fopen(sctx->screen->context_roll_log_filename, "a");
-   ac_gather_context_rolls(f, ibs, ib_dw_sizes, cs->num_prev + 1, &sctx->screen->info);
+   ac_gather_context_rolls(f, ibs, ib_dw_sizes, cs->num_prev + 1, NULL, &sctx->screen->info);
    fclose(f);
 }