diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-05-10 18:23:20 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-05-15 14:11:23 +0300 |
| commit | 72d2031070e26f1de192cbcbbb45ba774183ab30 (patch) | |
| tree | 5b570f4292ff360b01191103585a47b643dc35e6 | |
| parent | 9d7d1e8b1c13322982da169176cbdd94f66f371d (diff) | |
drm/i915/gvt: Use the full PLANE_KEY*() defines
Stop hand rolling PLANE_KEY*() register defines and just
use the real thing.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
CC: Zhi Wang <zhi.wang.linux@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c index ad3bf60855bc..b53c98cd6d7f 100644 --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c @@ -1075,15 +1075,15 @@ static int iterate_skl_plus_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(_MMIO(0x70034)); MMIO_D(_MMIO(0x71034)); MMIO_D(_MMIO(0x72034)); - MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_A))); - MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_B))); - MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_C))); - MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_A))); - MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_B))); - MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_C))); - MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_A))); - MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_B))); - MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_C))); + MMIO_D(PLANE_KEYVAL(PIPE_A, 0)); + MMIO_D(PLANE_KEYVAL(PIPE_B, 0)); + MMIO_D(PLANE_KEYVAL(PIPE_C, 0)); + MMIO_D(PLANE_KEYMAX(PIPE_A, 0)); + MMIO_D(PLANE_KEYMAX(PIPE_B, 0)); + MMIO_D(PLANE_KEYMAX(PIPE_C, 0)); + MMIO_D(PLANE_KEYMSK(PIPE_A, 0)); + MMIO_D(PLANE_KEYMSK(PIPE_B, 0)); + MMIO_D(PLANE_KEYMSK(PIPE_C, 0)); MMIO_D(_MMIO(0x44500)); #define CSFE_CHICKEN1_REG(base) _MMIO((base) + 0xD4) MMIO_RING_D(CSFE_CHICKEN1_REG); |