diff options
author | Luo Xionghu <xionghu.luo@intel.com> | 2015-11-11 15:35:28 +0800 |
---|---|---|
committer | Yang Rong <rong.r.yang@intel.com> | 2015-12-18 14:56:28 +0800 |
commit | 38d1047d9c5e85242bd85671c1f060c868c66a1d (patch) | |
tree | c20a084dfdf2c57197d21231133787c266e3a4c8 | |
parent | d33bc63b8b3d13e75c55d96f06c6ad16d906f4fc (diff) |
gbe: fix uitofp instruction issue.
llvm 3.7 may generate cast instructions "%13 = uitofp i1 %12 to float",
while the dst type is float or double , should call the coresponding
newXXXimmediate function.
Signed-off-by: Luo Xionghu <xionghu.luo@intel.com>
Reviewed-by: "Yang, Rong R" <rong.r.yang@intel.com>
-rw-r--r-- | backend/src/llvm/llvm_gen_backend.cpp | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/backend/src/llvm/llvm_gen_backend.cpp b/backend/src/llvm/llvm_gen_backend.cpp index 7c5b8a09..68e49ec8 100644 --- a/backend/src/llvm/llvm_gen_backend.cpp +++ b/backend/src/llvm/llvm_gen_backend.cpp @@ -3094,11 +3094,21 @@ namespace gbe // We use a select (0,1) not a convert when the destination is a boolean if (srcType == ir::TYPE_BOOL) { const ir::RegisterFamily family = getFamily(dstType); - const ir::ImmediateIndex zero = ctx.newIntegerImmediate(0, dstType); + ir::ImmediateIndex zero; + if(dstType == ir::TYPE_FLOAT) + zero = ctx.newFloatImmediate(0); + else if(dstType == ir::TYPE_DOUBLE) + zero = ctx.newDoubleImmediate(0); + else + zero = ctx.newIntegerImmediate(0, dstType); ir::ImmediateIndex one; if (I.getOpcode() == Instruction::SExt && (dstType == ir::TYPE_S8 || dstType == ir::TYPE_S16 || dstType == ir::TYPE_S32 || dstType == ir::TYPE_S64)) one = ctx.newIntegerImmediate(-1, dstType); + else if(dstType == ir::TYPE_FLOAT) + one = ctx.newFloatImmediate(1); + else if(dstType == ir::TYPE_DOUBLE) + one = ctx.newDoubleImmediate(1); else one = ctx.newIntegerImmediate(1, dstType); const ir::Register zeroReg = ctx.reg(family); |