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2015-05-26drm/amdgpu: implement the allocation range (v2)amdgpu-upstream-wip6Chunming Zhou8-62/+131
Pass a ttm_placement pointer to amdgpu_bo_create_restricted add min_offset to amdgpu_bo_pin_restricted. This makes it easier to allocate memory with address restrictions. With this patch we can also enable 2-ended allocation again. v2: fix rebase conflicts Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)yanyang155-707/+1067
The structure is renamed and moved to amd_shared.h to make the component independent. This makes it easier to add new components in the future. v2: fix include path Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: drop allocation flag masksChristian König1-8/+0
Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-05-26drm/amdgpu: drop AMDGPU_FENCE_SIGNALED_SEQChristian König2-15/+0
It's causing issues with VMID handling and comparing the fence value two times actually doesn't make handling faster. Port of radeon commit "d6d5c5b8364bcc4d52cddc68bcb0a330d2af20f3". Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-05-26drm/amdgpu: port fault_reserve_notify changes from radeonChristian König1-20/+35
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: enable uvd dpm and powergatingSonny Jiang3-3/+91
Enable UVD dpm (dynamic power management) and powergating. UVD dpm dynamically scales the UVD clocks on demand. Powergating turns off the power to the block when it's not in use. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: implement VCE two instances supportLeo Liu1-54/+87
VCE 3.0 has two indentical instances in the engine, they share the same registers name in differrent memory block distinguished by the grbm_gfx_index, we set to master instance after init, it will dispatch task to slave instance. These two instances will share the same firmware, but have their own stacks and heaps. v2: add mutex for using grbm_gfx_index Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: recalculate VCE firmware BO sizeLeo Liu5-15/+20
Firmware required BO size changes in terms of ASIC family Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: remove unused TRACE_SYSTEM_STRING defineAlex Deucher1-1/+0
Port of 77cb2fea1e5fc4b083dd967f231bbf6edd96150e to amdgpu. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: rework tiling flagsMarek Olšák6-304/+58
Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: don't set unused tiling flagsMarek Olšák1-13/+1
Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: actually use the VM map parametersChristian König1-2/+3
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: validate amdgpu_vm_bo_map parametersChristian König1-0/+7
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: enforce AMDGPU_GEM_CREATE_NO_CPU_ACCESSChristian König2-1/+5
Deny user and kernel mapping if we said we never want to do so. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handlingChristian König2-4/+4
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: retry dcpd fetchAlex Deucher1-9/+11
Retry the dpcd fetch several times. Some eDP panels fail several times before the fetch is successful. bug: https://bugs.freedesktop.org/show_bug.cgi?id=73530 Ported from radeon. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: simplify DPCD debug outputAlex Deucher1-5/+4
Use %*ph rather than walking the array. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: make some DP parameters constAlex Deucher1-7/+7
Ported from similar radeon patch. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: take the mode_config mutex when handling hpdsAlex Deucher1-0/+2
Since we may modify display state. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: add and implement the GPU reset status queryMarek Olšák4-17/+37
Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-05-26drm/amdgpu: add some new tonga pci idsAlex Deucher1-0/+2
Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: add new bonaire pci idAlex Deucher1-0/+1
Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: rewording some left radeonsJammy Zhou2-3/+3
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: switch to amdgpu folder for firmware files v2Jammy Zhou8-47/+47
v2: keep using radeon folder for CIK Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: do necessary NULL checkJammy Zhou1-2/+5
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: expose the max virtual addressJammy Zhou2-0/+3
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: fix context switchChristian König5-21/+26
Properly protect the state and also handle submission failures. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-05-26drm/amdgpu: fix dereference before checkChristian König1-2/+4
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-05-26drm/amdgpu: cleanup HDP flush handlingChristian König7-54/+18
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-05-26drm/amdgpu: always emit GDS switchChristian König1-1/+1
Otherwise a process can access the GDS data of another process. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-05-26drm/amdgpu: add CE preamble flag v3Jammy Zhou3-0/+17
The CE preamble IB can be dropped for the same context v2: use the flags directly v3: remove 'CE' for potential preamble usage by other rings Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: add flags for amdgpu_ib structureJammy Zhou5-10/+7
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: check context id for context switching (v2)Jammy Zhou2-1/+4
check the filp is not robust, and sometimes different contexts may have same filp value. v2: check both filp and ctx_id Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: add ctx_id to the WAIT_CS IOCTL (v4)Jammy Zhou4-1/+39
It is required to support fence per context. v2: add amdgpu_ctx_get/put v3: improve get/put v4: squash hlock fix Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: allow unaligned memory access (v2)Jack Xiao5-4/+22
Set up the CP and SDMA for proper unaligned memory access. Required for OpenCL 2.x v2: udpate commit message Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-05-26drm/amdgpu: make the CTX ioctl thread-safeMarek Olšák3-12/+12
The existing locks were protecting the list, but not the elements. v2: rename hlock to lock Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-05-26drm/amdgpu: remove unsafe context releasingMarek Olšák1-10/+2
If ctx was released between put and get, then "get" would crash. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-05-26drm/amdgpu: fix userptr lockupChristian König1-0/+3
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-05-26drm/amdgpu: fix userptr BO unpin bug (v2)monk.liu1-5/+3
sg could point to array of contigiouse page*, only free page could lead to memory leak. v2: use iterator Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: remove AMDGPU_GEM_CREATE_CPU_GTT_UCJammy Zhou2-13/+4
This flag isn't used by user mode drivers, remove it to avoid confusion. And rename GTT_WC to GTT_USWC to make it clear. Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu fix amdgpu.dpm=0 (v2)Sonny Jiang1-4/+13
Fix crash when disabling dpm. v2: agd5f: fix coding style, cleanup commit message Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: memset gds_info struct in info ioctlAlex Deucher1-0/+1
Avoids possibility that info may leak via the uninitialized _pad element. Noticed-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: fix error handling in cz_dpm_hw_fini/cz_dpm_suspendAlex Deucher1-6/+2
Need to unlock the mutex on error. Noticed-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: let bo_list handler start from 1monk.liu1-1/+1
this could prevent mis-understanding, because libdrm side will consider no bo_list created if handleis zero Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: fix bug occurs when bo_list is NULLmonk.liu1-9/+9
Still need to handle ibs BO and validate them even bo_list is NULL Signed-off-by: Monk.Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: fix error check issue in amdgpu_mn_invalidate_range_startJack Xiao1-5/+5
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: drop ttm two ended allocationAlex Deucher1-6/+0
amdgpu_bo_create() calls amdgpu_ttm_placement_from_domain() before ttm_bo_init() is called. amdgpu_ttm_placement_from_domain() uses the ttm bo size to determine when to select top down allocation but since the ttm bo is not initialized yet the check is always false. It only took affect when buffers were validated later. It also seemed to regress suspend and resume on some systems possibly due to it not taking affect in amdgpu_bo_create(). amdgpu_bo_create() and amdgpu_ttm_placement_from_domain() need to be reworked substantially for this to be optimally effective. Re-enable it at that point. Ported from radeon commit: a239118a24b3bf9089751068e431dfb63dc4168b Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/amdgpu: add VI pci idsAlex Deucher1-0/+20
Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: add CIK pci idsAlex Deucher1-0/+83
Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/amdgpu: Add initial VI supportAlex Deucher49-6/+33097
This adds initial support for VI asics. This includes Iceland, Tonga, and Carrizo. Our inital focus as been Carrizo, so there are still gaps in support for Tonga and Iceland, notably power management. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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